llvm-svn: 36028

llvm-svn: 35975

llvm-svn: 35962

llvm-svn: 35957

This can happen for intrinsics that are overloaded.  In such cases it is
necessary to emit a function prototype before the body of the function
that calls the intrinsic and to ensure we don't emit it multiple times.

llvm-svn: 35954

llvm-svn: 35951

llvm-svn: 35940

llvm-svn: 35926

llvm-svn: 35909

llvm-svn: 35884

Put the parameter attributes in their own ParamAttr name space. Adjust the
rest of llvm as a result.

llvm-svn: 35877

llvm-svn: 35869

llvm-svn: 35867

llvm-svn: 35859

llvm-svn: 35846

llvm-svn: 35845

llvm-svn: 35840

are always unsupported.

llvm-svn: 35835

Fixes unexpected failures on FreeBSD/amd64 of:
  CFrontend/2005-09-24-BitFieldCrash.c:
  CFrontend/2007-02-04-EmptyStruct.c:
  CFrontend/2007-03-26-ZeroWidthBitfield.c:
  CodeGen/Generic/2005-10-18-ZeroSizeStackObject.ll:

llvm-svn: 35828

Adapt handling of parameter attributes to use the new ParamAttrsList class.

llvm-svn: 35814

getRegClassForInlineAsmConstraint to being handled by
getRegForInlineAsmConstraint.  This allows us to let the llvm register allocator
allocate, which gives us better code.  For example, X86/2007-01-29-InlineAsm-ir.ll
used to compile to:

_run_init_process:
        subl $4, %esp
        movl %ebx, (%esp)
        xorl %ebx, %ebx
        movl $11, %eax
        movl %ebx, %ecx
        movl %ebx, %edx
        # InlineAsm Start
        push %ebx ; movl %ebx,%ebx ; int $0x80 ; pop %ebx
        # InlineAsm End

Now we get:
_run_init_process:
        xorl %ecx, %ecx
        movl $11, %eax
        movl %ecx, %edx
        # InlineAsm Start
        push %ebx ; movl %ecx,%ebx ; int $0x80 ; pop %ebx
        # InlineAsm End

llvm-svn: 35804

used with x constraints.

llvm-svn: 35803

llvm-svn: 35799

type.

llvm-svn: 35674

llvm-svn: 35640

llvm-svn: 35639

llvm-svn: 35638

llvm-svn: 35637

llvm-svn: 35635

llvm-svn: 35634

llvm-svn: 35627

LowerVASTART emits the right code if the subtarget is ELF32, the other intrinsics
(VAARG, VACOPY and VAEND) are not yet implemented.

llvm-svn: 35625

as the 64-bit PowerOpen ABI" (Reference http://www.linux-foundation.org/spec/ELF/ppc64/).
Change all ELF tests to ELF32.

llvm-svn: 35624

"The ELF ABI specifies F1-F8 registers as argument registers for double, not
F1-F10. This affects only ELF, not MachO."

llvm-svn: 35623

F1-F10. This affects only ELF, not MachO.

llvm-svn: 35622

llvm-svn: 35619

llvm-svn: 35617

llvm-svn: 35616

CodeGen/ARM/arm-negative-stride.ll to:

LBB1_2: @bb
        str r1, [r3, -r0, lsl #2]
        add r0, r0, #1
        cmp r0, r2
        bne LBB1_2      @bb

llvm-svn: 35609

llvm-svn: 35602