llvm-svn: 188933

llvm-svn: 188932

llvm-svn: 188931

With r185721, calling mangleCXXRTTIName on C code will cause crashes.
This commit fixes crashes on C testing cases when turning on struct-path TBAA.

For C code, we simply use the Decl name without the context. This can
cause two different structs having the same name, and may cause inaccurate but
conservative alias results.

llvm-svn: 188930

llvm-svn: 188929

Also obsessively reorder the headers to be in something closer to alphabetical order.

llvm-svn: 188928

llvm-svn: 188927

llvm-svn: 188926

llvm-svn: 188925

llvm-svn: 188924

Check that they are correctly computed if the last instruction is
larger than 1 byte.

llvm-svn: 188923

as reported by static analyer API with CF_CONSUMED.

llvm-svn: 188922

[CMake] Automatically pick up subdirectories in llvm/tools as 'external projects' if they contain a 'CMakeLists.txt' file.

Allow CMake to pick up external projects in llvm/tools without the need to modify the "llvm/tools/CMakeLists.txt" file.
This makes it easier to work with projects that live in other repositories, without needing to specify each one in "llvm/tools/CMakeLists.txt".

llvm-svn: 188921

recovering by adding empty parenthesis. Fixes PR16676!

llvm-svn: 188920

llvm-svn: 188919

llvm-svn: 188918

llvm-svn: 188917

llvm-svn: 188916

llvm-svn: 188915

setter/getter implementations, migrate them to
nonatomic properties.

llvm-svn: 188914

setFeatureEnabled is never called with "32" or "64". The driver never passes it
and mips' getDefaultFeatures sets the Features map directly.

llvm-svn: 188913

llvm-svn: 188912

        def imm0_63 : Operand<i32>, ImmLeaf<i32, [{ return Imm >= 0 && Imm < 63;}]>{
As it seems Imm <63 should be Imm <= 63. ImmLeaf is used in pattern match, but there is already a function check the shift amount range, so just remove ImmLeaf. Also add a test to check 63.

llvm-svn: 188911

This is a partial revert of r188817 now that the driver handles -target-feature
in a single place.

llvm-svn: 188910

[CGF] Get rid of passing redundant VTable pointer around in CodeGenFunction::InitializeVTablePointer[s]

llvm-svn: 188909

These tests are failing on Haswell CPUs due to different instruction selection.

llvm-svn: 188908

llvm-svn: 188907

No functionality change other than changing the order of -target-feature
relative to other -cc1 command line arguments.

llvm-svn: 188906

llvm-svn: 188905

Drive-by llvm-objdump cleanup (don't hardcode ToolName).

llvm-svn: 188904

Offset in mmap(3) should be aligned to gepagesize(), 64k, or mmap(3) would fail.

TODO: Invetigate places where 4096 would be required as pagesize, or 4096 would satisfy.
llvm-svn: 188903

Thanks for Craig Topper for noticing it.

llvm-svn: 188902

According to the ARM specification, "mov" is a valid mnemonic for all Thumb2 MOV encodings.
To achieve this, the patch adds one instruction alias with a special range condition to avoid collision with the Thumb1 MOV.

llvm-svn: 188901

1. We now print the return type of lambdas and return type deduced functions
as "auto". Trailing return types with decltype print the underlying type.
2. Use the lambda or block scope for the PredefinedExpr type instead of the
parent function. This fixes PR16946, a strange mismatch between type of the
expression and the actual result.
3. Verify the type in CodeGen.
4. The type for blocks is still wrong. They are numbered and the name is not
known until CodeGen.

llvm-svn: 188900

llvm-svn: 188899

The initial port used MLG(R) for i64 UMUL_LOHI but left the other three
combinations as not-legal-or-custom.  Although 32x32->{32,32}
multiplications exist, they're not as quick as doing a normal 64-bit
multiplication, so it didn't seem like i32 SMUL_LOHI and UMUL_LOHI
would be useful.  There's also no direct instruction for i64 SMUL_LOHI,
so it needs to be implemented in terms of UMUL_LOHI.

However, not defining these patterns means that we don't convert
division by a constant into multiplication, so this patch fills
in the other cases.  The new i64 SMUL_LOHI sequence is simpler
than the one that we used previously for 64x64->128 multiplication,
so int-mul-08.ll now tests the full sequence.

llvm-svn: 188898

llvm-svn: 188897

I accidentally changed the encoding of the MSA registers to zero instead of 0
to 31. This change restores the encoding the registers had prior to r188893.

This didn't show up in the existing tests because direct-object emission isn't
implemented yet for MSA.

llvm-svn: 188896

llvm-svn: 188895

These are extensions of the existing FI[EDX]BR instructions, but use a spare
bit to suppress inexact conditions.

llvm-svn: 188894