llvm-svn: 86199

implicit zero-extend.

llvm-svn: 86196

llvm-svn: 86149

llvm-svn: 86146

llvm-svn: 86114

llvm-svn: 86068

aggressive testing of dynamic stack alignment.
Note that this is off by default, and enabled for LLCBETA nightly results.

llvm-svn: 86064

llvm-svn: 86057

saved instructions even if no stack adjustment for those saves is needed.

llvm-svn: 86056

llvm-svn: 86050

The KILL pseudo-instruction may survive to the asm printer pass, just like the IMPLICIT_DEF. Print the KILL as a comment instead of just leaving a blank line in the output.

With -asm-verbose=0, a blank line is printed, like IMPLICIT?DEF.

llvm-svn: 86041

llvm-svn: 86019

llvm-svn: 85980

Fix t2Int_eh_sjlj_setjmp. Immediate form of orr is a 32-bit instruction. So it should be 22 bytes instead of 20 bytes long.

llvm-svn: 85965

llvm-svn: 85952

llvm-svn: 85914

llvm-svn: 85878

between ARM/Thumb modes and does not require the low bit of the target
address to be set for Thumb.

llvm-svn: 85874

llvm-svn: 85871

llvm-svn: 85870

llvm-svn: 85869

llvm-svn: 85861

llvm-svn: 85850

llvm-svn: 85847

constant pool so they don't get wrapped separately.

llvm-svn: 85844

llvm-svn: 85824

have been passed as a reference.

llvm-svn: 85823

llvm-svn: 85809

llvm-svn: 85808

llvm-svn: 85806

llvm-svn: 85805

llvm-svn: 85798

llvm-svn: 85797

llvm-svn: 85787

llvm-svn: 85767

Do not infer the target type for COPY_TO_REGCLASS from dest regclass, this won't work if it can contain several types. Require explicit result type for the node for now. This fixes PR5364.

PS: It seems that blackfin usage of copy_to_regclass is completely bogus!
llvm-svn: 85766

llvm-svn: 85765

Use NEON reg-reg moves, where profitable. This reduces "domain-cross" stalls, when we used to mix vfp and neon code (the former were used for reg-reg moves)

llvm-svn: 85764

llvm-svn: 85746

llvm-svn: 85743