Move the reloc size assert into AsmBackend - where it is more apropos.

llvm-svn: 136855

Fixes PR10527.

llvm-svn: 136853

llvm-svn: 136852

KeychainAPI checker: Add basic diagnostics. Track MemoryRegion istead of SymbolicRef since the address might not be a symbolic value in some cases, for example in fooOnlyFree() test.

llvm-svn: 136851

llvm-svn: 136850

llvm-svn: 136849

structures.  Alignment can be enforced with the use of anonymous bitfields 
(e.g., int :0), but this is not currently supported.  Add this test case to 
document the current state, which will hopefully be fixed shortly. 

llvm-svn: 136848

IDs will never cross module boundaries, since they're tied to the
CXXDefinitionData, so just use a local mapping throughout. Eliminate
the global -> local tables and supporting data.

llvm-svn: 136847

designed to be executed, and its output inspected for correct values,
but we aren't executing it. We're just compiling it, and dumping it to
/dev/null. It also isn't freestanding. If there is a desire to have this
test actually stick around, complain and I'll revert this and try to add
the file checks necessary to make this actually test things.

llvm-svn: 136846

Memory operand parsing is a bit haphazzard at the moment, in no small part
due to the even more haphazzard representations of memory operands in the .td
files. Start cleaning that all up, at least a bit.

The addressing modes in the .td files will be being simplified to not be
so monolithic, especially with regards to immediate vs. register offsets
and post-indexed addressing. addrmode3 is on its way with this patch, for
example.

This patch is foundational to enable going back to smaller incremental patches
for the individual memory referencing instructions themselves. It does just
enough to get the basics in place and handle the "make check" regression tests
we already have.

Follow-up work will be fleshing out the details and adding more robust test
cases for the individual instructions, starting with ARM mode and moving from
there into Thumb and Thumb2.

llvm-svn: 136845

LoopPassManager. The incremental update should be extremely cheap in
most cases and can be used in places where it's not feasible to
regenerate the entire loop forest.

- "Unloop" is a node in the loop tree whose last backedge has been removed.
- Perform reverse dataflow on the block inside Unloop to propagate the
  nearest loop from the block's successors.
- For reducible CFG, each block in unloop is visited exactly
  once. This is because unloop no longer has a backedge and blocks
  within subloops don't change parents.
- Immediate subloops are summarized by the nearest loop reachable from
  their exits or exits within nested subloops.
- At completion the unloop blocks each have a new parent loop, and
  each immediate subloop has a new parent.

llvm-svn: 136844

llvm-svn: 136843

It is possible to have multiple DBG_VALUEs for the same variable:

32L TEST32rr %vreg0<kill>, %vreg0, %EFLAGS<imp-def>; GR32:%vreg0
    DBG_VALUE 2, 0, !"i"
    DBG_VALUE %noreg, %0, !"i"

When that happens, keep the last one instead of the first.

llvm-svn: 136842

llvm-svn: 136841

llvm-svn: 136840

reader. Tested with the usual "gaps" method.

llvm-svn: 136839

llvm-svn: 136838

llvm-svn: 136837

This helps generate better code in functions with high register
pressure.

The previous version of compact region splitting caused regressions
because the regions were a bit too large. A stronger negative bias
applied in r136832 fixed this problem.

llvm-svn: 136836

[analyzer] rename all experimental checker packages to have 'experimental' be the common root package.

llvm-svn: 136835

Do not drop undef debug values. These are used as range termination marker by live debug variable pass.

llvm-svn: 136834

llvm-svn: 136833

Apply twice the negative bias on transparent blocks when computing the
compact regions. This excludes loop backedges from the region when only
one of the loop blocks uses the register.

Previously, we would include the backedge in the region if the loop
preheader and the loop latch both used the register, but the loop header
didn't.

When both the header and latch blocks use the register, we still keep it
live on the backedge.

llvm-svn: 136832

lib/CodeGen/RegAllocGreedy.cpp:1176:18: warning: unused variable 'B' [-Wunused-variable]
    if (unsigned B = Cand.getBundles(BundleCand, BestCand)) {
                 ^
lib/CodeGen/RegAllocGreedy.cpp:1188:18: warning: unused variable 'B' [-Wunused-variable]
    if (unsigned B = Cand.getBundles(BundleCand, 0)) {
                 ^

llvm-svn: 136831

the SBType implementation classes.

Fixed LLDB core and the test suite to not use deprecated SBValue APIs.

Added a few new APIs to SBValue:

    int64_t
    SBValue::GetValueAsSigned(int64_t fail_value=0);

    uint64_t
    SBValue::GetValueAsUnsigned(uint64_t fail_value=0)

 

llvm-svn: 136829

llvm-svn: 136828

llvm-svn: 136826

own, incorrectly, for releasing objects at the end of a full-expression.

llvm-svn: 136823

This is some of my original LLVM code. *wipes tear*

llvm-svn: 136821

Basic handling of Objective-C tagged pointers: return a custom ISA and typename when one is detected

llvm-svn: 136819

llvm-svn: 136818

reader, and fix up the one (!) place where we were improperly mapping
a local ID to a global ID. Tested via the usual "gaps" trick.

llvm-svn: 136817

llvm-svn: 136816

llvm-svn: 136815

llvm-svn: 136814

New approach to r136737: insert the necessary fences for atomic ops in platform-independent code, since a bunch of platforms (ARM, Mips, PPC, Alpha are the relevant targets here) need to do essentially the same thing.

I think this completes the basic CodeGen for atomicrmw and cmpxchg.

llvm-svn: 136813

llvm-svn: 136812

llvm-svn: 136811

llvm-svn: 136809

llvm-svn: 136808