- Mar 26, 2013
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Chandler Carruth authored
its own library. These functions are bridging between the bitcode reader and the ll parser which are in different libraries. Previously we didn't have any good library to do this, and instead played fast and loose with a "header only" set of interfaces in the Support library. This really doesn't work well as evidenced by the recent attempt to add timing logic to the these routines. As part of this, make them normal functions rather than weird inline functions, and sink the implementation into the library. Also clean up the header to be nice and minimal. This requires updating lots of build system dependencies to specify that the IRReader library is needed, and several source files to not implicitly rely upon the header file to transitively include all manner of other headers. If you are using IRReader.h, this commit will break you (the header moved) and you'll need to also update your library usage to include 'irreader'. I will commit the corresponding change to Clang momentarily. llvm-svn: 177971
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Arnold Schwaighofer authored
Move the CortexA9 resources into the CortexA9 SchedModel namespace. Define resource mappings under the CortexA9 SchedModel. Define resources and mappings for the SwiftModel. llvm-svn: 177968
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Arnold Schwaighofer authored
This is very much work in progress. Please send me a note if you start to depend on the added abstract read/write resources. They are subject to change until further notice. The old itinerary is still the default. llvm-svn: 177967
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Nick Lewycky authored
llvm-svn: 177963
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Nick Lewycky authored
it's only really useful if you're going to crash anyways. Use it in the pretty stack trace printer to kill the compiler if we hang while printing the stack trace. llvm-svn: 177962
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Michael Gottesman authored
[ObjCARC Annotations] Added support for displaying the state of pointers at the bottom/top of BBs of the ARC dataflow analysis for both bottomup and topdown analyses. This will allow for verification and analysis of the merge function of the data flow analyses in the ARC optimizer. The actual implementation of this feature is by introducing calls to the functions llvm.arc.annotation.{bottomup,topdown}.{bbstart,bbend} which are only declared. Each such call takes in a pointer to a global with the same name as the pointer whose provenance is being tracked and a pointer whose name is one of our Sequence states and points to a string that contains the same name. To ensure that the optimizer does not consider these annotations in any way, I made it so that the annotations are considered to be of IC_None type. A test case is included for this commit and the previous ObjCARCAnnotation commit. llvm-svn: 177952
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Michael Gottesman authored
[ObjCARC Annotations] Implemented ARC annotation metadata to expose the ARC data flow analysis state in the IR via metadata. Previously the inner works of the data flow analysis in ObjCARCOpts was hard to get out of the optimizer for analysis of bugs or testing. All of the current ARC unit tests are based off of testing the effect of the data flow analysis (i.e. what statements are removed or moved, etc.). This creates weakness in the current unit testing regimem since we are not actually testing what effects various instructions have on the modeled pointer state. Additionally in order to analyze a bug in the optimizer, one would need to track by hand what the optimizer was actually doing either through use of DEBUG statements or through the usage of a debugger, both yielding large loses in developer productivity. This patch deals with these two issues by providing ARC annotation metadata that annotates instructions with the state changes that they cause in various pointers as well as provides metadata to annotate provenance sources. Specifically, we introduce the following metadata types: 1. llvm.arc.annotation.bottomup. 2. llvm.arc.annotation.topdown. 3. llvm.arc.annotation.provenancesource. llvm.arc.annotation.{bottomup,topdown}: These annotations describes a state change in a pointer when we are visiting instructions bottomup/topdown respectively. The output format for both is the same: !1 = metadata !{metadata !"(test,%x)", metadata !"S_Release", metadata !"S_Use"} The first element is a string tuple with the following format: (function,variable name) The second two elements of the metadata show the previous state of the pointer (in this case S_Release) and the new state of the pointer (S_Use). We write the metadata in such a manner to ensure that it is easy for outside tools to parse. This is important since I am currently working on a tool for taking this information and pretty printing it besides the IR and that can be used for LIT style testing via the generation of an index. llvm.arc.annotation.provenancesource: This metadata is used to annotate instructions which act as provenance sources, i.e. ones that introduce a new (from the optimizer's perspective) non-argument pointer to track. This enables cross-referencing in between provenance sources and the state changes that occur to them. This is still a work in progress. Additionally I plan on committing later today additions to the annotations that annotate at the top/bottom of basic blocks the state of the various pointers being tracked. *NOTE* The metadata support is conditionally compiled into libObjCARCOpts only when we are producing a debug build of llvm/clang and even so are disabled by default. To enable the annotation metadata, pass in -enable-objc-arc-annotations to opt. llvm-svn: 177951
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Michael Liao authored
- It's still considered aligned when the specified alignment is larger than the natural alignment; - The new alignment for the high 128-bit vector should be min(16, alignment) as the pointer is advanced by 16, a power-of-2 offset. llvm-svn: 177947
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Michael Liao authored
- Handle the case where the result of 'insert_subvect' is bitcasted before 'extract_subvec'. This removes the redundant insertf128/extractf128 pair on unaligned 256-bit vector load/store on vectors of non 64-bit integer. llvm-svn: 177945
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Jakob Stoklund Olesen authored
The model isn't hooked up by this patch because the instruction set isn't fully annotated yet. llvm-svn: 177942
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Jakob Stoklund Olesen authored
All the instructions tagged with IIC_DEFAULT had nothing in common, and we already have a NoItineraries class to represent untagged instructions. llvm-svn: 177937
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Jakob Stoklund Olesen authored
llvm-svn: 177936
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Jakob Stoklund Olesen authored
llvm-svn: 177935
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- Mar 25, 2013
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Shuxin Yang authored
For instance, following transformation will be disabled: x + x + x => 3.0f * x; The problem of these transformations is that it introduces a FP constant, which following Instruction-Selection pass cannot handle. Reviewed by Nadav, thanks a lot! rdar://13445387 llvm-svn: 177933
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Eric Christopher authored
llvm-svn: 177920
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NAKAMURA Takumi authored
llvm-svn: 177910
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NAKAMURA Takumi authored
llvm-svn: 177909
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Shuxin Yang authored
The problem is that the code mistakenly took for granted that following constructor is able to create an APFloat from a *SIGNED* integer: APFloat::APFloat(const fltSemantics &ourSemantics, integerPart value) rdar://13486998 llvm-svn: 177906
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Akira Hatanaka authored
llvm-svn: 177899
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Eric Christopher authored
llvm-svn: 177898
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Ulrich Weigand authored
This commit updates the PowerPC back-end (PPCInstrInfo.td and PPCInstr64Bit.td) to use types instead of register classes in instruction patterns, along the lines of Jakob Stoklund Olesen's changes in r177835 for Sparc. llvm-svn: 177890
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Ulrich Weigand authored
This commit updates the PowerPC back-end (PPCInstrInfo.td and PPCInstr64Bit.td) to use types instead of register classes in Pat patterns, along the lines of Jakob Stoklund Olesen's changes in r177829 for Sparc. llvm-svn: 177889
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Dave Zarzycki authored
llvm-svn: 177888
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Dave Zarzycki authored
This fixes Apple bug: 13493622 llvm-svn: 177887
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Bill Wendling authored
llvm-svn: 177878
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Chad Rosier authored
sure the base register and would-be writeback register don't conflict for stores. This was already being done for loads. Unfortunately, it is rather difficult to create a test case for this issue. It was exposed in 450.soplex at LTO and requires unlucky register allocation. <rdar://13394908> llvm-svn: 177874
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Duncan Sands authored
llvm-svn: 177869
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Yiannis Tsiouris authored
llvm-svn: 177867
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Arnaud A. de Grandmaison authored
llvm-svn: 177863
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Arnaud A. de Grandmaison authored
This simplification happens at 2 places : - using the nsw attribute when the shl / mul is used by a sign test - when the shl / mul is compared for (in)equality to zero llvm-svn: 177856
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Michael Gottesman authored
Changed isNullOrUndef => IsNullOrUndef and isNoopInstruction => IsNoopInstruction so that all helper functions are named similarly in ObjCARC.h. llvm-svn: 177855
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- Mar 24, 2013
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Justin Holewinski authored
llvm-svn: 177847
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Jakob Stoklund Olesen authored
The types of register variables no longer need to be specified in output patterns. llvm-svn: 177845
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Jakob Stoklund Olesen authored
DAG arguments can optionally be named: (dag node, node:$name) With this change, the node is also optional: (dag node, node:$name, $name) The missing node is treated as an UnsetInit, so the above is equivalent to: (dag node, node:$name, ?:$name) This syntax is useful in output patterns where we currently require the types of variables to be repeated: def : Pat<(subc i32:$b, i32:$c), (SUBCCrr i32:$b, i32:$c)>; This is preferable: def : Pat<(subc i32:$b, i32:$c), (SUBCCrr $b, $c)>; llvm-svn: 177843
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Jakub Staszak authored
llvm-svn: 177837
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Jakub Staszak authored
No functionality change. llvm-svn: 177836
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Jakob Stoklund Olesen authored
Also update the documentation since Sparc is the nicest backend, and used as an example in WritingAnLLVMBackend. llvm-svn: 177835
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- Mar 23, 2013
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Hal Finkel authored
In order for the new ZERO register to be used with MC, etc. we need to specify its register number (0). Thanks to Kai for reporting the problem! llvm-svn: 177833
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Hal Finkel authored
In preparation for using the new register scavenger capability for providing more than one register simultaneously, specifically note functions that have spilled VRSAVE (currently, this can happen only in functions that use the setjmp intrinsic). As with CR spilling, such functions will need to provide two emergency spill slots to the scavenger. No functionality change intended. llvm-svn: 177832
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Hal Finkel authored
I recently added a BCL instruction definition as part of implementing SjLj support. This can also be used to MCize bcl emission in the asm printer. No functionality change intended. llvm-svn: 177830
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