llvm-svn: 96720

it to follow the mode needed by the new isel.  Instead of returning
the input and output chains, it just returns the (currently only one,
which is a silly limitation) node that has input and output chains.

Since we want the old thing to still work, add a new 
SelectScalarSSELoad to emulate the old interface.  The XXX suffix
and the wrapper will eventually go away.

llvm-svn: 96715

Also, FileCheck'ize a test.

llvm-svn: 96686

ARM and Thumb tests.

llvm-svn: 96680

dragonegg self-host build.  I reverted 96640 in order to revert
96556 (96640 goes on top of 96556), but it also looks like with
both of them applied the breakage happens even earlier.  The
symptom of the 96556 miscompile is the following crash:

  llvm[3]: Compiling AlphaISelLowering.cpp for Release build
  cc1plus: /home/duncan/tmp/tmp/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:4982: void llvm::SelectionDAG::ReplaceAllUsesWith(llvm::SDNode*, llvm::SDNode*, llvm::SelectionDAG::DAGUpdateListener*): Assertion `(!From->hasAnyUseOfValue(i) || From->getValueType(i) == To->getValueType(i)) && "Cannot use this version of ReplaceAllUsesWith!"' failed.
  Stack dump:
  0.	Running pass 'X86 DAG->DAG Instruction Selection' on function '@_ZN4llvm19AlphaTargetLowering14LowerOperationENS_7SDValueERNS_12SelectionDAGE'
  g++: Internal error: Aborted (program cc1plus)

This occurs when building LLVM using LLVM built by LLVM (via
dragonegg).  Probably LLVM has miscompiled itself, though it
may have miscompiled GCC and/or dragonegg itself: at this point
of the self-host build, all of GCC, LLVM and dragonegg were built
using LLVM.  Unfortunately this kind of thing is extremely hard
to debug, and while I did rummage around a bit I didn't find any
smoking guns, aka obviously miscompiled code.

Found by bisection.

r96556 | evancheng | 2010-02-18 03:13:50 +0100 (Thu, 18 Feb 2010) | 5 lines

Some dag combiner goodness:
Transform br (xor (x, y)) -> br (x != y)
Transform br (xor (xor (x,y), 1)) -> br (x == y)
Also normalize (and (X, 1) == / != 1 -> (and (X, 1)) != / == 0 to match to "test on x86" and "tst on arm"

r96640 | evancheng | 2010-02-19 01:34:39 +0100 (Fri, 19 Feb 2010) | 16 lines

Transform (xor (setcc), (setcc)) == / != 1 to
(xor (setcc), (setcc)) != / == 1.

e.g. On x86_64
  %0 = icmp eq i32 %x, 0
  %1 = icmp eq i32 %y, 0
  %2 = xor i1 %1, %0
  br i1 %2, label %bb, label %return
=>
	testl   %edi, %edi
	sete    %al
	testl   %esi, %esi
	sete    %cl
	cmpb    %al, %cl
	je      LBB1_2

llvm-svn: 96672

This hopefulyl should unbreak EH on PPC/Darwin.

llvm-svn: 96637

comes out as comments but will eventually generate DWARF.

llvm-svn: 96601

llvm-svn: 96574

Transform br (xor (x, y)) -> br (x != y)
Transform br (xor (xor (x,y), 1)) -> br (x == y)
Also normalize (and (X, 1) == / != 1 -> (and (X, 1)) != / == 0 to match to "test on x86" and "tst on arm"

llvm-svn: 96556

reverse engineering what they are.

llvm-svn: 96456

Hopefully, this will fix the remaining issues seen there.

llvm-svn: 96454

llvm-svn: 96440

It's not clear why this is really required, but it was explicitly
added in r48808 with no real explanation or rdar #.

llvm-svn: 96438

64 bits, fixing a variety of problems.

llvm-svn: 96421

into a roundss intrinsic, producing a cyclic dag.  The root cause
of this is badness handling ComplexPattern nodes in the old dagisel
that I noticed through inspection.  Eliminate a copy of the of the
code that handled ComplexPatterns by making EmitChildMatchCode call
into EmitMatchCode.

llvm-svn: 96408

If there exists a use of a build_vector that's the bitwise complement of the mask,
then transform the node to
(and (xor x, (build_vector -1,-1,-1,-1)), (build_vector ~c1,~c2,~c3,~c4)).

Since this transformation is only useful when 1) the given build_vector will
become a load from constpool, and 2) (and (xor x -1), y) matches to a single
instruction, I decided this is appropriate as a x86 specific transformation.
rdar://7323335

llvm-svn: 96389

Add support for emitting non-temporal stores for DAGs marked
non-temporal.  Fix from r96241 for botched encoding of MOVNTDQ.

Add documentation for !nontemporal metadata.

Add a simpler movnt testcase.

llvm-svn: 96386

llvm-svn: 96343

not the end of the field, fixing rdar://7651978

llvm-svn: 96330

llvm-svn: 96289

llvm-svn: 96288

Preliminary patch to improve dwarf EH generation - Hooks to return Personality / FDE / LSDA / TType encoding depending on target / options (e.g. code model / relocation model) - MCIzation of Dwarf EH printer to use encoding information - Stub generation for ELF target (needed for indirect references) - Some other small changes here and there

llvm-svn: 96285

and the testcase needs improvement.

llvm-svn: 96265

IsLegalToFold and IsProfitableToFold. The generic version of the later simply checks whether the folding candidate has a single use.

This allows the target isel routines more flexibility in deciding whether folding makes sense. The specific case we are interested in is folding constant pool loads with multiple uses.

llvm-svn: 96255

Add support for emitting non-temporal stores for DAGs marked
non-temporal.

llvm-svn: 96241

Remove an assumption of default arguments.  This is in anticipation of a
change to SelectionDAG build APIs.

llvm-svn: 96239

Remove an assumption of default arguments.  This is in anticipation of a
change to SelectionDAG build APIs.

llvm-svn: 96228

isInteger, we now have isFloatTy and isIntegerTy.  Requested by Chris!

llvm-svn: 96223

llvm-svn: 96174

Otherwise AT&T asm printer is used with non-compatible MCAsmInfo and
there is no way to override this behaviour.

llvm-svn: 96165

encoding them into nothing.

llvm-svn: 96110

llvm-svn: 96088

llvm-svn: 96076

tables.

llvm-svn: 96073

created. This ensures it's updated at all time. It means targets which perform
dynamic stack alignment would know whether it is required and whether frame
pointer register cannot be made available register allocation.
This is a fix for rdar://7625239. Sorry, I can't create a reasonably sized test
case.

llvm-svn: 96069

llvm-svn: 96065

We still have the templated X86 JIT emitter, *and* the
almost-copy in X86InstrInfo for getting instruction sizes.

llvm-svn: 96059

fix swapgs to be spelled right.

llvm-svn: 96058

llvm-svn: 96055

encoder and decoder by using new MRM_ forms.

llvm-svn: 96048