since they are in 64 bit mode with i64immSExt32 imms. JIT is not affected since 
it handles both word absolute relocations in the same way

llvm-svn: 78479

llvm-svn: 78475

Did anyone tests v4f32 ever?

llvm-svn: 78470

llvm-svn: 78469

llvm-svn: 78468

llvm-svn: 78464

 - This doesn't actually improve the algorithm (its still linear), but the
   generated (match) code is now fairly compact and table driven. Still need a
   generic string matcher.

 - The table still needs to be compressed, this is quite simple to do and should
   shrink it to under 16k.

 - This also simplifies and restructures the code to make the match classes more
   explicit, in anticipation of resolving ambiguities.

llvm-svn: 78461

so I generalized the class for VTRN in the .td file to handle all 3 of them.

llvm-svn: 78460

directly from the intrinsics produced by the frontend.  If it is more
convenient to have a custom DAG node for using these to implement shuffles,
we can add that later.

llvm-svn: 78459

llvm-svn: 78456

llvm-svn: 78455

llvm-svn: 78454

llvm-svn: 78453

error condition get trapped with an assert.

llvm-svn: 78449

llvm-svn: 78444

llvm-svn: 78443

llvm-svn: 78430

llvm-svn: 78428

llvm-svn: 78425

llvm-svn: 78420

llvm-svn: 78419

llvm-svn: 78418

llvm-svn: 78411

llvm-svn: 78410

llvm-svn: 78404

llvm-svn: 78399

llvm-svn: 78398

llvm-svn: 78397

llvm-svn: 78383

llvm-svn: 78382

llvm-svn: 78381

i386-apple-darwin9. This presumably will get fixed once the generated code
improves.

llvm-svn: 78379

 - Still not very sane, but a least its not 60k lines on X86. :)

 - In terms of correctness, currently some things are hard wired for X86, and we
   still don't properly resolve ambiguities (this is ignoring the instructions
   we don't even match due to funny .td stuff or other corner cases).

The high level changes:
 1. Represent tokens which are significant for matching explicitly as separate
    operands. This uniformly handles not only the instruction mnemonic, but
    also 'signficiant' syntax like the '*' in "call * ...".

 2. Separate the matching of operands to an instruction from the construction of
    the MCInst. In theory this can be done during matching, but since the number
    of variations is small I think it makes sense to decompose the problems.

 3. Improved a few of the mechanisms to at least successfully flatten / tokenize
    the assembly strings for PowerPC and ARM.

 4. The comment at the top of AsmMatcherEmitter.cpp explains the approach I'm
    moving towards for handling ambiguous instructions. The high-bit is to infer
    a partial ordering of the operand classes (and force the user to specify one
    if we can't) and use that to resolve ambiguities.

llvm-svn: 78378

llvm-svn: 78377

llvm-svn: 78370

llvm-svn: 78369

llvm-svn: 78365

llvm-svn: 78363

It turns out most of the thumb2 instructions are not allowed to touch SP. The semantics of such instructions are unpredictable. We have just been lucky that tests have been passing.

This patch takes pain to ensure all the PEI lowering code does the right thing when lowering frame indices, insert code to manipulate stack pointers, etc. It's also custom lowering dynamic stack alloc into pseudo instructions so we can insert the right instructions at scheduling time.

This fixes PR4659 and PR4682.

llvm-svn: 78361

module as first argument.

llvm-svn: 78340