llvm-svn: 32648

- Re-enable some codegen niceties for X86-64 static relocation model codegen.
- Clean ups, etc.

llvm-svn: 32238

llvm-svn: 32218

llvm-svn: 32067

llvm-svn: 32052

llvm-svn: 32026

llvm-svn: 31813

llvm-svn: 31325

2. Added partial debug support for mingw\cygwin targets (the same as
   Linux\ELF). Please note, that currently mingw\cygwin uses 'stabs' format
   for storing debug info by default, thus many (runtime) libraries has
   this information included. These formats shouldn't be mixed in one binary
   ('stabs' & 'DWARF'), otherwise binutils tools will be confused.

llvm-svn: 31311

generated object modules to be debugged with gdb. Hopefully this helps
pre-release debugging.

llvm-svn: 31299

Added workaround for linker bug with linkonce sections.
Changed sections prefix to allow linker merge them
(PE loader doesn't like too much long-named sections :) )
All of this unbreaks libstdc++ on mingw32 allowing (small)
programs to be compiled, linked and run.

llvm-svn: 31033

targets.

llvm-svn: 31011

llvm-svn: 30742

llvm-svn: 30737

llvm-svn: 30608

llvm-svn: 30549

Added X86 StdCall & FastCall calling conventions. Codegen will follow.

llvm-svn: 30446

DLL* linkages got full (I hope) codegeneration support in C & both x86
assembler backends.
External weak linkage added for future use, we don't provide any
codegeneration, etc. support for it.

llvm-svn: 30374

llvm-svn: 30177

llvm-svn: 30162

llvm-svn: 30126

llvm-svn: 29965

llvm-svn: 29946

llvm-svn: 29322

llvm-svn: 29318

llvm-svn: 29307

Missing Darwin check in Intel ATT ASM printer.

llvm-svn: 29204

code in sections other than ".text", including weak sections like ctors and
dtors.

llvm-svn: 28909

functions.

llvm-svn: 28781

llvm-svn: 28606

llvm-svn: 28493

Patch contributed by Anton Korobeynikov!

llvm-svn: 28480

llvm-svn: 28324

it wants it emitted to _text/_data.

llvm-svn: 28185

llvm-svn: 28184

movw. That is we promote the destination operand to r16. So
        %CH = TRUNC_R16_R8 %BP
is emitted as
        movw %bp, %cx.

This is incorrect. If %cl is live, it would be clobbered.
Ideally we want to do the opposite, that is emitted it as
        movb ??, %ch
But this is not possible since %bp does not have a r8 sub-register.

We are now defining a new register class R16_ which is a subclass of R16
containing only those 16-bit registers that have r8 sub-registers (i.e.
AX - DX). We isel the truncate to two instructions, a MOV16to16_ to copy the
value to the R16_ class, followed by a TRUNC_R16_R8.

Due to bug 770, the register colaescer is not going to coalesce between R16 and
R16_. That will be fixed later so we can eliminate the MOV16to16_. Right now, it
can only be eliminated if we are lucky that source and destination registers are
the same.

llvm-svn: 28164

that gets emitted as movl (for r32 to i16, i8) or a movw (for r16 to i8). And
if the destination gets allocated a subregister of the source operand, then
the instruction will not be emitted at all.

llvm-svn: 28119

llvm-svn: 28104

llvm-svn: 28099

llvm-svn: 28093