list

llvm-svn: 31847

llvm-svn: 31846

llvm-svn: 31845

llvm-svn: 31784

llvm-svn: 31698

llvm-svn: 31693

the defintion of bitconvert correspondingly.

llvm-svn: 31688

llvm-svn: 31607

llvm-svn: 31606

llvm-svn: 31605

llvm-svn: 31604

llvm-svn: 31603

llvm-svn: 31566

llvm-svn: 31565

This patch converts the old SHR instruction into two instructions,
AShr (Arithmetic) and LShr (Logical). The Shr instructions now are not
dependent on the sign of their operands.

llvm-svn: 31542

llvm-svn: 31532

Early commit of the documentation for new conversion instructions for
easier review.

llvm-svn: 31531

llvm-svn: 31440

Replace the REM instruction with UREM, SREM and FREM.

llvm-svn: 31369

llvm-svn: 31350

llvm-svn: 31239

llvm-svn: 31237

llvm-svn: 31234

Make necessary changes to support DIV -> [SUF]Div. This changes llvm to
have three division instructions: signed, unsigned, floating point. The
bytecode and assembler are bacwards compatible, however.

llvm-svn: 31195

This patch implements the first increment for the Signless Types feature.
All changes pertain to removing the ConstantSInt and ConstantUInt classes
in favor of just using ConstantInt.

llvm-svn: 31063

llvm-svn: 31032

llvm-svn: 30966

llvm-svn: 30965

llvm-svn: 30885

llvm-svn: 30876

llvm-svn: 30687

llvm-svn: 30645

its own page on the LLVM web site.

llvm-svn: 30447

Added X86 StdCall & FastCall calling conventions. Codegen will follow.

llvm-svn: 30446

DLL* linkages got full (I hope) codegeneration support in C & both x86
assembler backends.
External weak linkage added for future use, we don't provide any
codegeneration, etc. support for it.

llvm-svn: 30374

llvm-svn: 30313

llvm-svn: 30276

llvm-svn: 30247

llvm-svn: 30227

llvm-svn: 30175