llvm-svn: 36873

hardwiring in the C++ one.

llvm-svn: 36789

Implement support for expanding a bitcast from an illegal vector type to
a legal one (e.g. 4xi32 -> 4xf32 in SSE1).  This fixes PR1371 and
CodeGen/X86/2007-05-05-VecCastExpand.ll

llvm-svn: 36787

llvm-svn: 36781

some small cleanup was made.

llvm-svn: 36780

handle this case too.

llvm-svn: 36745

llvm-svn: 36716

and PR1382

llvm-svn: 36672

llvm-svn: 36662

llvm-svn: 36654

Due to darwin gcc bug, one version of darwin linker coalesces
static const int, which defauts PassID based pass identification.

llvm-svn: 36652

llvm-svn: 36648

1. Correct output offsets on Linux
2. Fix "style" of personality function. It shouldn't be indirect.

llvm-svn: 36633

llvm-svn: 36632

If call frame is not part of stack frame and no dynamic alloc, eliminateFrameIndex() must adjust SP offset with size of call frames.

llvm-svn: 36625

llvm-svn: 36622

llvm-svn: 36618

argument space for call sites in the function immediately on entry to the
current function. This eliminates the need for add/sub sp brackets around call
sites. However, this is not always a good idea. If the "call frame" is large and
the target load / store instructions have small immediate field to encode sp
offset, this can cause poor codegen. In the worst case, this can make it
impossible to scavenge a register if the reserved spill slot is pushed too far
apart from sp / fp.

llvm-svn: 36607

  produce two results.)
* Do not touch volatile loads.

llvm-svn: 36604

llvm-svn: 36602

llvm-svn: 36600

register, preallocate all input registers and the early clobbered output.

This fixes PR1357 and CodeGen/PowerPC/2007-04-30-InlineAsmEarlyClobber.ll

llvm-svn: 36599

llvm-svn: 36594

pieces of it.  No functionality change.

llvm-svn: 36592

llvm-svn: 36590

        # InlineAsm Start
        subfc r3,r5,r4
                subfze r4,r3
        # InlineAsm End

print:

        # InlineAsm Start
        subfc r3,r5,r4
        subfze r4,r3
        # InlineAsm End

llvm-svn: 36589

llvm-svn: 36568

llvm-svn: 36564

before the copies into physregs are done.  This avoids having flag operands
skip the store, causing cycles in the dag at sched time.  This fixes infinite
loops on these tests:

test/CodeGen/Generic/2007-04-08-MultipleFrameIndices.ll for PR1308
test/CodeGen/PowerPC/2007-01-29-lbrx-asm.ll
test/CodeGen/PowerPC/2007-01-31-InlineAsmAddrMode.ll
test/CodeGen/X86/2006-07-12-InlineAsmQConstraint.ll for PR828

llvm-svn: 36547

llvm-svn: 36546

llvm-svn: 36545

No functionality change.

llvm-svn: 36544

bitcasts of them.

llvm-svn: 36537

If the operand is not already an indirect operand, spill it to a constant
pool entry or a stack slot.

This fixes PR1356 and CodeGen/X86/2007-04-27-InlineAsm-IntMemInput.ll

llvm-svn: 36536

    CodeGen/Generic/2007-04-27-InlineAsm-X-Dest.ll

llvm-svn: 36534

llvm-svn: 36524

CodeGen/Generic/2007-04-14-EHSelectorCrash.ll and PR1326

llvm-svn: 36510

llvm-svn: 36501

llvm-svn: 36499

successfully! woohoo...

llvm-svn: 36496