- Oct 18, 2012
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Chandler Carruth authored
over the implicitly-formed-and-nesting CGSCC pass manager and function pass managers, especially when using them on the opt commandline or using extension points in the module builder. The '-barrier' opt flag (or the pass itself) will create a no-op module pass in the pipeline, resetting the pass manager stack, and allowing the creation of a new pipeline of function passes or CGSCC passes to be created that is independent from any previous pipelines. For example, this can be used to test running two CGSCC passes in independent CGSCC pass managers as opposed to in the same CGSCC pass manager. It also allows us to introduce a further hack into the PassManagerBuilder to separate the O0 pipeline extension passes from the always-inliner's CGSCC pass manager, which they likely do not want to participate in... At the very least none of the Sanitizer passes want this behavior. This fixes a bug with ASan at O0 currently, and I'll commit the ASan test which covers this pass. I'm happy to add a test case that this pass exists and works, but not sure how much time folks would like me to spend adding test cases for the details of its behavior of partition pass managers.... The whole thing is just vile, and mostly intended to unblock ASan, so I'm hoping to rip this all out in a brave new pass manager world. llvm-svn: 166172
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Nadav Rotem authored
llvm-svn: 166170
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Bob Wilson authored
The TargetTransform changes are breaking LTO bootstraps of clang. I am working with Nadav to figure out the problem, but I am reverting it for now to get our buildbots working. This reverts svn commits: 165665 165669 165670 165786 165787 165997 and I have also reverted clang svn 165741 llvm-svn: 166168
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Nadav Rotem authored
llvm-svn: 166167
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Nadav Rotem authored
for (i=0; i<n; i++){ a[i] = b[i+1] + c[i+3]; } llvm-svn: 166165
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Bill Wendling authored
llvm-svn: 166159
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Bill Wendling authored
llvm-svn: 166157
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Michael Liao authored
- Folding (trunc (concat ... X )) to (concat ... (trunc X) ...) is valid when '...' are all 'undef's. - r166125 relies on this transformation. llvm-svn: 166155
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NAKAMURA Takumi authored
llvm-svn: 166153
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Jakub Staszak authored
llvm-svn: 166138
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Michael Liao authored
- In general, it's unsafe for this transformation. llvm-svn: 166135
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Reed Kotler authored
llvm-svn: 166134
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- Oct 17, 2012
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Roman Divacky authored
llvm-svn: 166128
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Michael Liao authored
- If the extracted vector has the same type of all vectored being concatenated together, it should be simplified directly into v_i, where i is the index of the element being extracted. llvm-svn: 166125
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Jakob Stoklund Olesen authored
This is a more compact, less redundant representation, and it avoids scanning long lists of aliases for ARM D-registers, for example. llvm-svn: 166124
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Evan Cheng authored
any scheduling heuristics nor does it build up any scheduling data structure that other heuristics use. It essentially linearize by doing a DFA walk but it does handle glues correctly. IMPORTANT: it probably can't handle all the physical register dependencies so it's not suitable for x86. It also doesn't deal with dbg_value nodes right now so it's definitely is still WIP. rdar://12474515 llvm-svn: 166122
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Jakob Stoklund Olesen authored
All callers of these functions really want the isPhysRegOrOverlapUsed() functionality which also checks aliases. For historical reasons, targets without register aliases were calling isPhysRegUsed() instead. Change isPhysRegUsed() to also check aliases, and switch all isPhysRegOrOverlapUsed() callers to isPhysRegUsed(). llvm-svn: 166117
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Nadav Rotem authored
llvm-svn: 166112
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Jakob Stoklund Olesen authored
The previous MRI.isPhysRegUsed(YMM0) would also return true when the function contains a call to a function that may clobber YMM0. That's most of them. Checking the use-def chains allows us to skip functions that don't explicitly mention YMM registers. llvm-svn: 166110
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Anton Korobeynikov authored
Patch by Job Noorman! llvm-svn: 166108
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Andrew Trick authored
llvm-svn: 166107
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Daniel Dunbar authored
- Similar to Path::eraseFromDisk(), we don't want LLVM to remove things like /dev/null, even if it has the permission. llvm-svn: 166105
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Kostya Serebryany authored
llvm-svn: 166102
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Chandler Carruth authored
a pointer. A very bad idea. Let's not do that. Fixes PR14105. Note that this wasn't *that* glaring of an oversight. Originally, these routines were only called on offsets within an alloca, which are intrinsically positive. But over the evolution of the pass, they ended up being called for arbitrary offsets, and things went downhill... llvm-svn: 166095
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Chandler Carruth authored
revision makes no sense. We cannot use the address space of the *post indexed* type to conclude anything about a *pre indexed* pointer type's size. More importantly, this index can never be over a pointer. We are indexing over arrays and vectors here. Of course, I have no test case here. Neither did the original patch. =/ llvm-svn: 166091
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Michael Liao authored
- All shuffle insns required, especially PSHUB, are added in SSSE3. llvm-svn: 166086
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Michael Liao authored
- MBB address is only valid as an immediate value in Small & Static code/relocation models. On other models, LEA is needed to load IP address of the restore MBB. - A minor fix of MBB in MC lowering is added as well to enable target relocation flag being propagated into MC. llvm-svn: 166084
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Jakob Stoklund Olesen authored
This is just as fast, and it makes it possible to avoid leaking the UsedPhysRegs BitVector implementation through MachineRegisterInfo::addPhysRegsUsed(). llvm-svn: 166083
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Eric Christopher authored
llvm-svn: 166077
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Eric Christopher authored
llvm-svn: 166076
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Jakob Stoklund Olesen authored
PR14098 contains an example where we would rematerialize a MOV8ri immediately after the original instruction: %vreg7:sub_8bit<def> = MOV8ri 9; GR32_ABCD:%vreg7 %vreg22:sub_8bit<def> = MOV8ri 9; GR32_ABCD:%vreg7 Besides being pointless, it is also wrong since the original instruction only redefines part of the register, and the value read by the new instruction is wrong. The problem was the LiveRangeEdit::allUsesAvailableAt() didn't special-case OrigIdx == UseIdx and found the wrong SSA value. llvm-svn: 166068
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Jakob Stoklund Olesen authored
A fix for PR14098, including the test case is in the next commit. llvm-svn: 166067
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- Oct 16, 2012
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Michael Gottesman authored
An obfuscated splat is where the frontend poorly generates code for a splat using several different shuffles to create the splat, i.e., %A = load <4 x float>* %in_ptr, align 16 %B = shufflevector <4 x float> %A, <4 x float> undef, <4 x i32> <i32 0, i32 0, i32 undef, i32 undef> %C = shufflevector <4 x float> %B, <4 x float> %A, <4 x i32> <i32 0, i32 1, i32 4, i32 undef> %D = shufflevector <4 x float> %C, <4 x float> %A, <4 x i32> <i32 0, i32 1, i32 2, i32 4> llvm-svn: 166061
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Chad Rosier authored
llvm-svn: 166054
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Jakub Staszak authored
llvm-svn: 166053
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Michael Liao authored
llvm-svn: 166051
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Jakub Staszak authored
llvm-svn: 166050
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Michael Liao authored
llvm-svn: 166049
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Rafael Espindola authored
llvm+clang+compiler-rt bootstrap. llvm-svn: 166046
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Jakub Staszak authored
llvm-svn: 166045
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