llvm-svn: 45388

llvm-svn: 45377

Fold certain additions through selects (and their compares) so as to eliminate subtractions. This code is often produced by the SMAX expansion in SCEV.

This implements test/Transforms/InstCombine/2007-12-18-AddSelCmpSub.ll

llvm-svn: 45158

llvm-svn: 45141

_foo:
	movl	$12, %eax
	andl	4(%esp), %eax
	movl	_array(%eax), %eax
	ret

instead of:

_foo:
	movl	4(%esp), %eax
	shrl	$2, %eax
	andl	$3, %eax
	movl	_array(,%eax,4), %eax
	ret

As it turns out, this triggers all the time, in a wide variety of
situations, for example, I see diffs like this in various programs:

-       movl    8(%eax), %eax
-       shll    $2, %eax
-       andl    $1020, %eax
-       movl    (%esi,%eax), %eax
+       movzbl  8(%eax), %eax
+       movl    (%esi,%eax,4), %eax


-       shll    $2, %edx
-       andl    $1020, %edx
-       movl    (%edi,%edx), %edx
+       andl    $255, %edx
+       movl    (%edi,%edx,4), %edx

Unfortunately, I also see stuff like this, which can be fixed in the
X86 backend:

-       andl    $85, %ebx
-       addl    _bit_count(,%ebx,4), %ebp
+       shll    $2, %ebx
+       andl    $340, %ebx
+       addl    _bit_count(%ebx), %ebp

llvm-svn: 44656

llvm-svn: 44638

llvm-svn: 42573

llvm-svn: 36811

upgrade the syntax of some other examples.

llvm-svn: 36806

llvm-svn: 35296

llvm-svn: 35143

entry:
        icmp ugt i32 %x, 4              ; <i1>:0 [#uses=1]
        br i1 %0, label %cond_true, label %cond_false

cond_true:              ; preds = %entry
        %tmp1 = tail call i32 (...)* @bar( i32 12 )             ; <i32> [#uses=0]
        ret void

cond_false:             ; preds = %entry
        switch i32 %x, label %cond_true15 [
                 i32 4, label %cond_true3
                 i32 3, label %cond_true7
                 i32 2, label %cond_true11
                 i32 0, label %cond_false17
        ]

...

llvm-svn: 35142

Change use of "packed" term to "vector" in comments, strings, variable
names, etc.

llvm-svn: 34300

llvm-svn: 34249

llvm-svn: 33252

This patch removes the SetCC instructions and replaces them with the ICmp
and FCmp instructions. The SetCondInst instruction has been removed and
been replaced with ICmpInst and FCmpInst.

llvm-svn: 32751

The rot example works if the type is cast to ubyte.

Move sroa examples together and upgrade them to HEAD syntax.

llvm-svn: 32423

llvm-svn: 32347

llvm-svn: 32013

llvm-svn: 31719

llvm-svn: 31696

llvm-svn: 31612

llvm-svn: 31477

llvm-svn: 31429

Make necessary changes to support DIV -> [SUF]Div. This changes llvm to
have three division instructions: signed, unsigned, floating point. The
bytecode and assembler are bacwards compatible, however.

llvm-svn: 31195

llvm-svn: 31156

llvm-svn: 30642

llvm-svn: 30598

llvm-svn: 30483

llvm-svn: 30451

llvm-svn: 30418

llvm-svn: 30399

_swap_16:
        slwi r2, r3, 24
        rlwimi r2, r3, 8, 8, 15
        srwi r3, r2, 16
        blr

now.

llvm-svn: 29864

llvm-svn: 29863

llvm-svn: 28572

llvm-svn: 28424

llvm-svn: 28402

llvm-svn: 28398

llvm-svn: 28384

llvm-svn: 27907