This patch was developed on top of original patch by Artur Pietrek.

llvm-svn: 112678

llvm-svn: 112677

with a new cursor kind for a reference to a namespace. 

There's still some oddities in the source location information for
NamespaceAliasDecl that I'll address with a separate commit, so the
source locations displayed in the load-namespaces.cpp test will
change.

llvm-svn: 112676

llvm-svn: 112675

llvm-svn: 112673

in wide strings. radar 8360841.

llvm-svn: 112672

llvm-svn: 112671

llvm-svn: 112670

instead of hoisting them, just fold them away.  This occurs in the
testcase for PR8041, for example.

llvm-svn: 112669

and output the dwarf line number tables.  This takes the current loc info after
an instruction is assembled and saves the needed info into an object that has
vector and for each section.  These objects will be used for the final patch to 
build and emit the encoded dwarf line number tables.  Again for now this is only
in the Mach-O streamer but at some point will move to a more generic place.

llvm-svn: 112668

llvm-svn: 112667

llvm-svn: 112666

inner loop doesn't update all the variables in the outer loop.

llvm-svn: 112665

int x(int t) {
  if (t & 256)
    return -26;
  return 0;
}

We generate this:

     tst.w   r0, #256
     mvn     r0, #25
     it      eq
     moveq   r0, #0

while gcc generates this:

     ands    r0, r0, #256
     it      ne
     mvnne   r0, #25
     bx      lr

Scandalous really!

During ISel time, we can look for this particular pattern. One where we have a
"MOVCC" that uses the flag off of a CMPZ that itself is comparing an AND
instruction to 0. Something like this (greatly simplified):

  %r0 = ISD::AND ...
  ARMISD::CMPZ %r0, 0         @ sets [CPSR]
  %r0 = ARMISD::MOVCC 0, -26  @ reads [CPSR]

All we have to do is convert the "ISD::AND" into an "ARM::ANDS" that sets [CPSR]
when it's zero. The zero value will all ready be in the %r0 register and we only
need to change it if the AND wasn't zero. Easy!

llvm-svn: 112664

llvm-svn: 112663

llvm-svn: 112662

llvm-svn: 112661

expectedFailure because in dwarf format, "variable list this" returns an error.

llvm-svn: 112660

llvm-svn: 112659

llvm-svn: 112657

llvm-svn: 112656

determines the kind of declaration that would be generated if the
given template were instantiated. This allows a client to distinguish
among class/struct/union templates and function/member function/static
member function templates.

Also, teach clang_CXXMethod_isStatic() about function templates.

llvm-svn: 112655

llvm-svn: 112654

llvm-svn: 112653

llvm-svn: 112652

No CCR virtual registers should exist, and %EFLAGS is used in ways that can
surprise RegAllocFast.

llvm-svn: 112650

Reserved registers are unpredictable, and are treated as always live by machine
DCE.

Allocatable registers are never reserved, and can be used for virtual registers.

Unreserved, unallocatable registers can not be used for virtual registers, but
otherwise behave like a normal allocatable register. Most targets only have
the flag register in this set.

llvm-svn: 112649

llvm-svn: 112646

llvm-svn: 112644

llvm-svn: 112643

llvm-svn: 112642

member-pointer refactoring:  dereferencing a member data pointer.

llvm-svn: 112640

llvm-svn: 112638

Make inline namespace not be transparent after all. The concept simply doesn't fit. Instead, special-case the few places where transparent contexts have the desired behavior for inline namespaces. Fixes a redeclaration issue in inline namespaces.

llvm-svn: 112637

template. Such cursors occur, for example, in template specialization
types such as vector<int>. Note that we do not handle the
super-interesting case where the template name is unresolved, e.g.,
within a template.

llvm-svn: 112636

llvm-svn: 112635

More cleanups of my JumpThreading transforms, including extracting some duplicated code into a helper function.

llvm-svn: 112634

llvm-svn: 112632

llvm-svn: 112631

llvm-svn: 112630