Expand postra machine licm's capability a little more. If an instruction's register operands are all loop invariants, then it's safe to hoist it.

llvm-svn: 101167

Sometimes it is desirable to sink instructions along a critical edge:

x = ...
if (a && b) ...
else use(x);

The 'a && b' condition creates a critical edge to the else block, but we still
want to sink the computation of x into the block. The else block is dominated by
the parent block, so we are not pushing instructions into new code paths.

llvm-svn: 101165

Teach postra machine licm to hoist more obvious invariants, e.g. instructions with no source operands.

llvm-svn: 101154

llvm-svn: 101148

MachineBasicBlock::livein_iterator a const_iterator, because
clients shouldn't ever be using the iterator interface to
mutate the livein set.

llvm-svn: 101147

the rest of CodeGen.

llvm-svn: 101146

llvm-svn: 101145

llvm-svn: 101143

patch by Sylvere Teissier!

llvm-svn: 101106

llvm-svn: 101043

llvm-svn: 101034

llvm-svn: 101023

llvm-svn: 101010

llvm-svn: 100904

llvm-svn: 100867

llvm-svn: 100858

llvm-svn: 100852

llvm-svn: 100850

llvm-svn: 100849

llvm-svn: 100824

llvm-svn: 100815

merge XCore's section into MCSectionELF

llvm-svn: 100812

api and update clients to use MCContext instead.

llvm-svn: 100808

the compiler and asmparser now unique to the same sections.  This fixes
rdar://7835021.

llvm-svn: 100807

%RDI<def,dead> = MOV64rr %RAX<kill>, %EDI<imp-def>

llvm-svn: 100804

llvm-svn: 100799

llvm-svn: 100797

implicit defs get added to the end of machine instrs sometimes.  Scan the whole instruction for the metadata operand instead of assuming it will be at the end of the instruction.

llvm-svn: 100792

There is no need to remember labels identifying regions marked by such instructions in each scope.

llvm-svn: 100781

llvm-svn: 100771

llvm-svn: 100769

llvm-svn: 100768

llvm-svn: 100756

llvm-svn: 100751

llvm-svn: 100742

so the user at least knows what inline asm is a problem.  For example:

error: inline asm not supported yet: don't know how to handle tied indirect register inputs
pr8788-1.c:14:10: note: generated from here
    asm ("\n" : "+r" (stack->regs)
         ^

Instead of:
fatal error: error in backend: Don't know how to handle tied indirect register inputs yet!

llvm-svn: 100731

llvm-svn: 100725

llvm-svn: 100724

and use it in one place in inline asm handling stuff.  Before
we'd generate this for an invalid modifier letter:

$ clang asm.c -c -o t.o
fatal error: error in backend: Invalid operand found in inline asm: 'abc incl    ${0:Z}'
INLINEASM <es:abc incl    ${0:Z}>, 10, %EAX<def>, 2147483657, %EAX, 14, %EFLAGS<earlyclobber,def,dead>, <!-1>


Now we generate this:

$ clang asm.c -c -o t.o
error: invalid operand in inline asm: 'incl    ${0:Z}'
asm.c:3:12: note: generated from here
  __asm__ ("incl    %Z0" : "+r" (X));
           ^
1 error generated.

This is much better but still admittedly not great ("why" is the operand 
invalid??), codegen should try harder with its diagnostics :)

llvm-svn: 100723

llvm-svn: 100709