llvm-svn: 113116

llvm-svn: 112109

llvm-svn: 111813

We are generating movaps for all XMM register copies, including scalar
floating point values. This is known to be at least as good as movss and movsd
for all known architectures up to and including Nehalem because it avoids a
partial register stall.

The SSEDomainFix pass will switch movaps to movdqa when appropriate (i.e., when
operands come from the integer unit). We don't now that switching movaps to
movapd has any benefit.

The same applies to andps -> pand.

llvm-svn: 108096

llvm-svn: 107613

llvm-svn: 105377

llvm-svn: 105376

respectively.

llvm-svn: 97531

llvm-svn: 95781

llvm-svn: 95649

llvm-svn: 95299

llvm-svn: 93373

llvm-svn: 63752

SSE disabled.

llvm-svn: 63751

The memory alignment requirement on some of the mov{h|l}p{d|s} patterns are 16-byte. That is overly strict. These instructions read / write f64 memory locations without alignment requirement.

llvm-svn: 63195

llvm-svn: 56391

llvm-svn: 54964

  shift.
- Add a readme entry for a missing vector_shuffle optimization that results in
  awful codegen.

llvm-svn: 52740

llvm-svn: 51526

llvm-svn: 51501

llvm-svn: 51491

llvm-svn: 51487

instruction for doing this?

llvm-svn: 51473

llvm-svn: 51062

llvm-svn: 51060

Instead of a vector load, shuffle and then extract an element. Load the element from address with an offset.
        pshufd $1, (%rdi), %xmm0
        movd %xmm0, %eax
=>
        movl 4(%rdi), %eax

llvm-svn: 51026

llvm-svn: 51019

Xform bitconvert(build_pair(load a, load b)) to a single load if the load locations are at the right offset from each other.

llvm-svn: 51008

llvm-svn: 50959

llvm-svn: 49466

llvm-svn: 49465

into a vector of zeros or undef, and when the top part is obviously
zero, we can just use movd + shuffle.  This allows us to compile
vec_set-B.ll into:

_test3:
	movl	$1234567, %eax
	andl	4(%esp), %eax
	movd	%eax, %xmm0
	ret

instead of:

_test3:
	subl	$28, %esp
	movl	$1234567, %eax
	andl	32(%esp), %eax
	movl	%eax, (%esp)
	movl	$0, 4(%esp)
	movq	(%esp), %xmm0
	addl	$28, %esp
	ret

llvm-svn: 48090

llvm-svn: 48064

#include <xmmintrin.h>
__m128i doload64(short x) {return _mm_set_epi16(0,0,0,0,0,0,0,1);}

into:
	movl	$1, %eax
	movd	%eax, %xmm0
	ret

instead of a constant pool load.

llvm-svn: 48063

llvm-svn: 48055

llvm-svn: 48054

llvm-svn: 47948

llvm-svn: 47939

llvm-svn: 47828

llvm-svn: 47109