llvm-svn: 154507

llvm-svn: 154506

While there is an encoding for it in VZIP, the result of that is undefined,
so we should avoid it. Define the instruction as a pseudo for VTRN.32
instead, as the ARM ARM indicates.

rdar://11221911

llvm-svn: 154505

Added a new "heap.py" module that adds a new command line command that can find values on the heap and print out the dynamic type of the malloc block that contains the data. I will be modifying this a bit more to tweak the output and make the output more useful.

llvm-svn: 154504

llvm-svn: 154503

llvm-svn: 154502

llvm-svn: 154501

Thanks to Pino Toscano for the patch

llvm-svn: 154500

llvm-svn: 154499

FoldingSet is implemented as a chained hash table. When there is a hash
collision during insertion, which is common as we fill the table until a
load factor of 2.0 is hit, we walk the chained elements, comparing every
operand with the new element's operands. This can be very expensive if the
MDNode has many operands.

We sacrifice a word of space in MDNode to cache the full hash value, reducing
compares on collision to a minimum. MDNode grows from 28 to 32 bytes + operands
on x86. On x86_64 the new bits fit nicely into existing padding, not growing
the struct at all.

The actual speedup depends a lot on the test case and is typically between
1% and 2% for C++ code with clang -c -O0 -g.

llvm-svn: 154497

llvm-svn: 154496

llvm-svn: 154495

llvm-svn: 154494

binary and assembly. Patch by Carlo Kok.  Emitting was inspired by but not based
on the D llvm bindings. 

llvm-svn: 154493

Yea, 'NumCallerCallersAnalyzed' isn't a great name, suggestions welcome.

llvm-svn: 154492

Fix a dagcombine optimization which assumes that the vsetcc result type is always
of the same size as the compared values. This is ture for SSE/AVX/NEON but not
for all targets.

llvm-svn: 154490

llvm-svn: 154488

This reverts commit 97bd8d50881000c11b65b0e033996ec5f57bcd15.

llvm-svn: 154487

This reverts commit 2c6bdbf972ac966498489d30a33bfd252df9107d.

llvm-svn: 154486

llvm-svn: 154485

llvm-svn: 154484

Original message:
Modify the code that lowers shuffles to blends from using blendvXX to vblendXX.
blendV uses a register for the selection while Vblend uses an immediate.
On sandybridge they still have the same latency and execute on the same execution ports.

llvm-svn: 154483

dependent upon metadata ordering.

llvm-svn: 154482

an explicit instance variable.

rdar://10590352

llvm-svn: 154481

predicates.
Also remove NEON2 since it's not really useful and it is confusing. If
NEON + VFP4 implies NEON2 but NEON2 doesn't imply NEON + VFP4, what does it
really mean?

rdar://10139676

llvm-svn: 154480

llvm-svn: 154479

llvm-svn: 154478

llvm-svn: 154477

llvm-svn: 154476

emits but not clang.

llvm-svn: 154475

Handle mixing allocatable and unallocatable register gracefully.
Simplify the pruning of register unit sets.

llvm-svn: 154474

llvm-svn: 154473

output the errors that occurred even if we did not get an AST (e.g. because the
PCH failed to load).

Also honor displayDiagnostics in clang_indexSourceFile().

rdar://11203489

llvm-svn: 154472

llvm-svn: 154469

ret instructions.

llvm-svn: 154468

llvm-svn: 154466

for all opcodes handed by DecodeVLDInstruction() in ARMDisassembler.cpp .

llvm-svn: 154459

Cleaned up the Mutex::Locker and the ReadWriteLock classes a bit.

Also cleaned up the GDBRemoteCommunication class to not have so many packet functions. Used the "NoLock" versions of send/receive packet functions when possible for a bit of performance.

llvm-svn: 154458

rdar://11222742

llvm-svn: 154457

1. The new instruction itinerary entries are not properly described.
2. The asm parser can't handle vfms and vfnms.
3. There were no assembler, disassembler test cases.
4. HasNEON2 has the wrong assembler predicate.
rdar://10139676

llvm-svn: 154456