llvm-svn: 11987

llvm-svn: 11986

llvm-svn: 11985

llvm-svn: 11984

llvm-svn: 11983

llvm-svn: 11982

llvm-svn: 11981

llvm-svn: 11980

llvm-svn: 11979

llvm-svn: 11978

llvm-svn: 11977

methods take an int or unsigned value instead of int64_t.

Also, add an 'addImm' method to the MachineInstrBuilder class, because the
fact that the hardware sign or zero extends it does not/should not matter
to the code generator.  Once the old sparc backend is removed the difference
can be eliminated.

llvm-svn: 11976

llvm-svn: 11975

llvm-svn: 11974

llvm-svn: 11973

to denote this fact.

llvm-svn: 11972

denote this fact.

llvm-svn: 11971

parse. The name is now I (operand size)*. For example:

Im32 -> instruction with 32-bit memory operands.

Im16i8 -> instruction with 16-bit memory operands and 8 bit immediate
          operands.

llvm-svn: 11970

operand but their sizes differ.

llvm-svn: 11969

llvm-svn: 11968

the size of the immediate and the memory operand on instructions that
use them. This resolves problems with instructions that take both a
memory and an immediate operand but their sizes differ (i.e. ADDmi32b).

llvm-svn: 11967

llvm-svn: 11966

llvm-svn: 11965

and br->br code and generalizing it.  This allows us to compile code like this:

int test(Instruction *I) {
  if (isa<CastInst>(I))
    return foo(7);
  else if (isa<BranchInst>(I))
    return foo(123);
  else if (isa<UnwindInst>(I))
    return foo(1241);
  else if (isa<SetCondInst>(I))
    return foo(1);
  else if (isa<VAArgInst>(I))
    return foo(42);
  return foo(-1);
}

into:

int %_Z4testPN4llvm11InstructionE("struct.llvm::Instruction"* %I) {
entry:
        %tmp.1.i.i.i.i.i.i.i = getelementptr "struct.llvm::Instruction"* %I, long 0, ubyte 4            ; <uint*> [#uses=1]
        %tmp.2.i.i.i.i.i.i.i = load uint* %tmp.1.i.i.i.i.i.i.i          ; <uint> [#uses=2]
        %tmp.2.i.i.i.i.i.i = seteq uint %tmp.2.i.i.i.i.i.i.i, 27                ; <bool> [#uses=0]
        switch uint %tmp.2.i.i.i.i.i.i.i, label %endif.0 [
                 uint 27, label %then.0
                 uint 2, label %then.1
                 uint 5, label %then.2
                 uint 14, label %then.3
                 uint 15, label %then.3
                 uint 16, label %then.3
                 uint 17, label %then.3
                 uint 18, label %then.3
                 uint 19, label %then.3
                 uint 32, label %then.4
        ]
...

As well as handling the cases in 176.gcc and many other programs more effectively.

llvm-svn: 11964

immediately abort due to lack of an instruction selector. :)

llvm-svn: 11963

mark the PPC backend as experimental

llvm-svn: 11962

llvm-svn: 11961

llvm-svn: 11960

llvm-svn: 11959

llvm-svn: 11958

llvm-svn: 11957

llvm-svn: 11956

llvm-svn: 11955

llvm-svn: 11954

Do not just inject a new prototype.

llvm-svn: 11951

same name

llvm-svn: 11950

llvm-svn: 11949

tblgen.

llvm-svn: 11948

llvm-svn: 11947

llvm-svn: 11946