No code will be inserted after the split point anyway.

llvm-svn: 126319

llvm-svn: 126316

llvm-svn: 126315

llvm-svn: 126314

llvm-svn: 126313

Fix type mismatch between property function that CGObjCGNU was returning and the one CGObjC was calling.  Fixes bug r9294.

llvm-svn: 126312

llvm-svn: 126311

llvm-svn: 126310

on Clang when it builds using LLVM as an external library.

Fixes PR9293.

llvm-svn: 126309

llvm-svn: 126308

	NSAutoreleasePoolChecker
	ObjCAtSyncChecker

llvm-svn: 126307

llvm-svn: 126306

Teach CFGBuilder about null pointer constants in conditionals, and how they can be used to prune branches.  Fixes false null pointer dereference warning in PR 8183.

llvm-svn: 126305

Add null check in CursorVisitor::RunVisitorWorkList() when visiting LabelDecls.  Fixes <rdar://problem/9040579>.

llvm-svn: 126304

llvm-svn: 126303

it to ignore valid uses of FS and GS as additional
base registers in address computations.  Added a test
case for this.

llvm-svn: 126302

caused it to only parse one line of input.

llvm-svn: 126301

llvm-svn: 126300

llvm-svn: 126299

llvm-svn: 126298

r124468.  Patch by Rafael Avila de Espindola!

llvm-svn: 126297

llvm-svn: 126296

The previous codegen for the slow path (when values are in VFP / NEON
registers) was incorrect if the source is NaN.

The new codegen uses NEON vbsl instruction to copy the sign bit. e.g.
        vmov.i32        d1, #0x80000000
        vbsl    d1, d2, d0
If NEON is not available, it uses integer instructions to copy the sign bit.
rdar://9034702

llvm-svn: 126295

Add test case (from PR 8876) for suppressing 'indirection of non-volatile null pointer...' warning due to reachability analysis.

llvm-svn: 126294

Rd == 13.  Add opcode entries for the generic "sub (sp minus immediate)" operations.

llvm-svn: 126293

llvm-svn: 126292

Add test case for PR 9284, a false positive for -Warray-bounds that is now addressed using basic reachability analysis.

llvm-svn: 126291

Enhance Sema::DiagRuntimeBehavior() to delay some diagnostics to see if the related code is reachable.  This suppresses some
diagnostics that occur in unreachable code (e.g., -Warray-bound).

We only pay the cost of doing the reachability analysis when we issue one of these diagnostics.

llvm-svn: 126290

Migrate CFGReachabilityAnalysis out of the IdempotentOperationsChecker and into its own analysis file.

llvm-svn: 126289

llvm-svn: 126288

Issue AnalysisBasedWarnings as part of calling Sema::PopBlockOrFunctionScope().  No real functionality change.

llvm-svn: 126287

Update Sema::DiagRuntimeBehavior() to take an optional Stmt* to indicate the code the diagnostic is associated with.

This Stmt* is unused, but we will use it shortly for pruning diagnostics associated
with unreachable code.

llvm-svn: 126286

Change -Warray-bounds logic to use DiagRuntimeBehavior in preparation for using basic dataflow to suppress warnings on unreachable array bounds checks.

llvm-svn: 126285

	CastToStructChecker
	FixedAddressChecker
	MacOSXAPIChecker
	PointerArithChecker
	PointerSubChecker
	PthreadLockChecker
	UnixAPIChecker

llvm-svn: 126284

llvm-svn: 126283

When a large live range is evicted, it will usually be split when it comes
around again. By deferring evicted live ranges, the splitting happens at a time
when the interference pattern is more realistic. This prevents repeated
splitting and evictions.

llvm-svn: 126282

exist. Cheat and do this by adding some wrappers around the PresumedLoc
machinery that directly return the line and column number.

llvm-svn: 126281

llvm-svn: 126280

Fix PR9276: We were missing the checks for auto deducing to different types in the same declaration group in the template instantiation case.

llvm-svn: 126279

of Stephen Wilson's idea (thanks for the input Stephen!). What I ended up
doing was:
- Got rid of ArchSpec::CPU (which was a generic CPU enumeration that mimics
  the contents of llvm::Triple::ArchType). We now rely upon the llvm::Triple 
  to give us the machine type from llvm::Triple::ArchType.
- There is a new ArchSpec::Core definition which further qualifies the CPU
  core we are dealing with into a single enumeration. If you need support for
  a new Core and want to debug it in LLDB, it must be added to this list. In
  the future we can allow for dynamic core registration, but for now it is
  hard coded.
- The ArchSpec can now be initialized with a llvm::Triple or with a C string
  that represents the triple (it can just be an arch still like "i386").
- The ArchSpec can still initialize itself with a architecture type -- mach-o
  with cpu type and subtype, or ELF with e_machine + e_flags -- and this will
  then get translated into the internal llvm::Triple::ArchSpec + ArchSpec::Core.
  The mach-o cpu type and subtype can be accessed using the getter functions:
  
  uint32_t
  ArchSpec::GetMachOCPUType () const;

  uint32_t
  ArchSpec::GetMachOCPUSubType () const;
  
  But these functions are just converting out internal llvm::Triple::ArchSpec 
  + ArchSpec::Core back into mach-o. Same goes for ELF.

All code has been updated to deal with the changes.

This should abstract us until later when the llvm::TargetSpec stuff gets
finalized and we can then adopt it.

llvm-svn: 126278