llvm-svn: 142480

llvm-svn: 142464

llvm-svn: 142460

used with the CMP instruction.

llvm-svn: 142458

This reverts commit 494f7ac3e8d2ab3d94e52317abf9c42a949fe1f3.

llvm-svn: 142455

llvm-svn: 142441

register and then compare against that" method when it's too large. We have to
move the value into the register in the "movw, movt" pair of instructions.

llvm-svn: 142440

I'll remove/rename the option in a few days.

llvm-svn: 142439

register and then compare against that" method when it's too large. We have to
move the value into the register in the "movw, movt" pair of instructions.

llvm-svn: 142437

llvm-svn: 142436

llvm-svn: 142435

llvm-svn: 142434

Teach fast isel about vector stores, and make DoSelectCall return false when it fails to emit a store. This fixes <rdar://problem/10215997>.

llvm-svn: 142432

instruction. Move the value into a register and then use that for the CMP.
<rdar://problem/10305266>

llvm-svn: 142431

and use that in the CMP.
<rdar://problem/10305266>

llvm-svn: 142429

llvm-svn: 142416

llvm-svn: 142413

llvm-svn: 142412

llvm-svn: 142410

llvm-svn: 142408

incorrect for bigendian systems.

llvm-svn: 142403

Clean up the patterns, fix comments, and avoid confusing both tools
and coders. Note that the special adds/subs SelectionDAG nodes no
longer have the dummy cc_out operand.

llvm-svn: 142397

llvm-svn: 142395

llvm-svn: 142394

predecessor to remove the jump to it as well. Delay clearing the 'landing pad'
flag until after the jumps have been removed. (There is an implicit assumption
in several modules that an MBB which jumps to a landing pad has only two
successors.)
<rdar://problem/10304224>

llvm-svn: 142390

llvm-svn: 142389

llvm-svn: 142386

llvm-svn: 142381

-Fix binary codes and rename operands in .td files so that automatically
generated function MipsCodeEmitter::getBinaryCodeForInstr gives correct
encoding for instructions.
-Define new class FMem for instructions that access memory.
-Define new class FFRGPR for instructions that move data between GPR and
FPU general and control registers.
-Define custom encoder methods for memory operands, and also for size
operands of ext and ins instructions.
-Only static relocation model is currently implemented.

Patch by Sasa Stankovic

llvm-svn: 142378

<rdar://problem/10298332>

llvm-svn: 142371

svn r139159 caused SelectionDAG::getConstant() to promote BUILD_VECTOR operands
with illegal types, even before type legalization.  For this testcase, that led
to one BUILD_VECTOR with i16 operands and another with promoted i32 operands,
which triggered the assertion.

llvm-svn: 142370

llvm-svn: 142365

llvm-svn: 142363

llvm-svn: 142356

llvm-svn: 142352

build with gcc-4.6.

llvm-svn: 142350

llvm-svn: 142341

llvm-svn: 142338

rdar://10288916

llvm-svn: 142337

llvm-svn: 142336