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  1. Feb 13, 2004
  2. Feb 12, 2004
  3. Feb 04, 2004
  4. Feb 03, 2004
  5. Dec 14, 2003
    • Alkis Evlogimenos's avatar
      Change interface of MachineOperand as follows: · aaba4639
      Alkis Evlogimenos authored
          a) remove opIsUse(), opIsDefOnly(), opIsDefAndUse()
          b) add isUse(), isDef()
          c) rename opHiBits32() to isHiBits32(),
                    opLoBits32() to isLoBits32(),
                    opHiBits64() to isHiBits64(),
                    opLoBits64() to isLoBits64().
      
      This results to much more readable code, for example compare
      "op.opIsDef() || op.opIsDefAndUse()" to "op.isDef()" a pattern used
      very often in the code.
      
      llvm-svn: 10461
      aaba4639
  6. Nov 11, 2003
  7. Oct 20, 2003
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  10. Aug 05, 2003
  11. Aug 03, 2003
  12. Jul 10, 2003
  13. May 31, 2003
  14. May 27, 2003
    • Vikram S. Adve's avatar
      (1) Added special register class containing (for now) %fsr. · 7366fa1a
      Vikram S. Adve authored
          Fixed spilling of %fcc[0-3] which are part of %fsr.
      
      (2) Moved some machine-independent reg-class code to class TargetRegInfo
          from SparcReg{Class,}Info.
      
      (3) Renamed MachienOperand::opIsDef to MachineOperand::opIsDefOnly()
          and related functions and flags.  Fixed several bugs where only
          "isDef" was being checked, not "isDefAndUse".
      
      llvm-svn: 6341
      7366fa1a
  15. Jan 15, 2003
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