llvm-svn: 133821

- Rename TargetRegisterDesc to MCRegisterDesc.

llvm-svn: 133820

is not implemented. // rdar://9651605

llvm-svn: 133819

The fixup value comes in as the whole 32-bit value, so for the lo16 fixup,
the upper bits need to be masked off. Previously we assumed the masking had
already been done and asserted.

rdar://9635991

llvm-svn: 133818

making unsafe assignment of a retainable 
object, Per John's request.

llvm-svn: 133817

Fixes crash in http://llvm.org/PR10109 & rdar://9584039.

llvm-svn: 133816

llvm-svn: 133815

The i8 type is required for boolean values, but can only use ld, st and mov instructions. The i1 type continues to be used for predicates.

llvm-svn: 133814

instructions can be used to match combinations of multiply/divide and VCVT 
(between floating-point and integer, Advanced SIMD).  Basically the VCVT 
immediate operand that specifies the number of fraction bits corresponds to a 
floating-point multiply or divide by the corresponding power of 2.

For example, VCVT (floating-point to fixed-point, Advanced SIMD) can replace a 
combination of VMUL and VCVT (floating-point to integer) as follows:

Example (assume d17 = <float 8.000000e+00, float 8.000000e+00>):
  vmul.f32        d16, d17, d16
  vcvt.s32.f32    d16, d16
becomes:
  vcvt.s32.f32    d16, d16, #3

Similarly, VCVT (fixed-point to floating-point, Advanced SIMD) can replace a 
combinations of VCVT (integer to floating-point) and VDIV as follows:

Example (assume d17 = <float 8.000000e+00, float 8.000000e+00>):
  vcvt.f32.s32    d16, d16
  vdiv.f32        d16, d17, d16
becomes:
  vcvt.f32.s32    d16, d16, #3

llvm-svn: 133813

     .file and .loc directives.

Ideally, we would utilize the existing support in AsmPrinter for this, but
I cannot find a way to get .file and .loc directives to print without the
rest of the associated DWARF sections, which ptxas cannot handle.

llvm-svn: 133812

 enables SelectionDAG::getLoad at MipsISelLowering.cpp:1914 to return a
pre-existing node instead of redundantly create a new node every time it is
called.

llvm-svn: 133811

llvm-svn: 133810

llvm-svn: 133809

rdar://9667872

llvm-svn: 133808

llvm-svn: 133807

objects.  // rdar://9495837

llvm-svn: 133806

llvm-svn: 133805

if the location given points at the last token of the macro instantiation.

Fixes rdar://9045701.

llvm-svn: 133804

static variables or functions. 

llvm-svn: 133803

points to a macro instantiation.

llvm-svn: 133802

at the start of a macro instantiation.

llvm-svn: 133801

is at the first token but that the location's offset is not inside the token as well.

llvm-svn: 133800

     targets: g80, gt200, gf100(fermi)

llvm-svn: 133799

llvm-svn: 133798

we cannot duplicate to every predecessor.

llvm-svn: 133797

LLVM_ON_WIN32 is defined in llvm/Config/config.h.
IMO, it might be enough with _WIN32 in most cases, LLVM_ON_xxx could be deprecated.

llvm-svn: 133794

llvm-svn: 133793

llvm-svn: 133792

Make the generated InitXXXMCRegisterInfo function "static inline", so it doesn't get emitted into multiple object files.

This caused linker errors when linking both libLLVMX86Desc and libLLVMX86CodeGen
into a single binary (for example when building a monolithic libLLVM shared library).

llvm-svn: 133791

llvm-svn: 133790

llvm-svn: 133787

llvm-svn: 133786

connected process connection.

Also added support for more kinds of continue packet when multiple threads
need to continue where some want to continue with signals.

llvm-svn: 133785

conventions. I then discovered a typo in the using declaration bit in
LookupSpecialMember. This led to discovering [namespace.udecl]p15, which
clang implements incorrectly. Thus I've added a comment and implemented
the code consistently with the rest of clang - that is incorrectly.

And because I don't want to include tests of something incorrect, I've
ripped the test out.

llvm-svn: 133784

target machine from those that are only needed by codegen. The goal is to
sink the essential target description into MC layer so we can start building
MC based tools without needing to link in the entire codegen.

First step is to refactor TargetRegisterInfo. This patch added a base class
MCRegisterInfo which TargetRegisterInfo is derived from. Changed TableGen to
separate register description from the rest of the stuff.

llvm-svn: 133782

llvm-svn: 133781

llvm-svn: 133780

Rename objc_lifetime -> objc_ownership, and modify diagnostics to talk about 'ownership', not 'lifetime'.

rdar://9477613.

llvm-svn: 133779

It should not crash lldb.

This checkin adds calls for SBAddress.

llvm-svn: 133778

llvm-svn: 133776