llvm-svn: 54964

  shift.
- Add a readme entry for a missing vector_shuffle optimization that results in
  awful codegen.

llvm-svn: 52740

llvm-svn: 51526

llvm-svn: 51501

llvm-svn: 51491

llvm-svn: 51487

instruction for doing this?

llvm-svn: 51473

llvm-svn: 51062

llvm-svn: 51060

Instead of a vector load, shuffle and then extract an element. Load the element from address with an offset.
        pshufd $1, (%rdi), %xmm0
        movd %xmm0, %eax
=>
        movl 4(%rdi), %eax

llvm-svn: 51026

llvm-svn: 51019

Xform bitconvert(build_pair(load a, load b)) to a single load if the load locations are at the right offset from each other.

llvm-svn: 51008

llvm-svn: 50959

llvm-svn: 49466

llvm-svn: 49465

into a vector of zeros or undef, and when the top part is obviously
zero, we can just use movd + shuffle.  This allows us to compile
vec_set-B.ll into:

_test3:
	movl	$1234567, %eax
	andl	4(%esp), %eax
	movd	%eax, %xmm0
	ret

instead of:

_test3:
	subl	$28, %esp
	movl	$1234567, %eax
	andl	32(%esp), %eax
	movl	%eax, (%esp)
	movl	$0, 4(%esp)
	movq	(%esp), %xmm0
	addl	$28, %esp
	ret

llvm-svn: 48090

llvm-svn: 48064

#include <xmmintrin.h>
__m128i doload64(short x) {return _mm_set_epi16(0,0,0,0,0,0,0,1);}

into:
	movl	$1, %eax
	movd	%eax, %xmm0
	ret

instead of a constant pool load.

llvm-svn: 48063

llvm-svn: 48055

llvm-svn: 48054

llvm-svn: 47948

llvm-svn: 47939

llvm-svn: 47828

llvm-svn: 47109

llvm-svn: 47051

Add some notes to the README.

llvm-svn: 46949

llvm-svn: 46413

llvm-svn: 46405

eliminating the llvm.x86.sse2.loadl.pd intrinsic?), one shuffle optzn
may be done (if shufps is better than pinsw, Evan, please review), and
we already know about LICM of simple instructions.

llvm-svn: 45407

llvm-svn: 45280

llvm-svn: 43444

llvm-svn: 42549

llvm-svn: 42548

llvm-svn: 42542

llvm-svn: 42345

llvm-svn: 41359

llvm-svn: 41103

llvm-svn: 39772

llvm-svn: 38507

llvm-svn: 35439