llvm-svn: 35869

llvm-svn: 35867

llvm-svn: 35845

llvm-svn: 35840

getRegClassForInlineAsmConstraint to being handled by
getRegForInlineAsmConstraint.  This allows us to let the llvm register allocator
allocate, which gives us better code.  For example, X86/2007-01-29-InlineAsm-ir.ll
used to compile to:

_run_init_process:
        subl $4, %esp
        movl %ebx, (%esp)
        xorl %ebx, %ebx
        movl $11, %eax
        movl %ebx, %ecx
        movl %ebx, %edx
        # InlineAsm Start
        push %ebx ; movl %ebx,%ebx ; int $0x80 ; pop %ebx
        # InlineAsm End

Now we get:
_run_init_process:
        xorl %ecx, %ecx
        movl $11, %eax
        movl %ecx, %edx
        # InlineAsm Start
        push %ebx ; movl %ecx,%ebx ; int $0x80 ; pop %ebx
        # InlineAsm End

llvm-svn: 35804

used with x constraints.

llvm-svn: 35803

llvm-svn: 35799

llvm-svn: 35638

llvm-svn: 35637

llvm-svn: 35634

llvm-svn: 35617

llvm-svn: 35616

llvm-svn: 35560

llvm-svn: 35532

llvm-svn: 35531

llvm-svn: 35523

llvm-svn: 35521

llvm-svn: 35489

llvm-svn: 35439

llvm-svn: 35438

behaviour in some cases.

llvm-svn: 35437

llvm-svn: 35435

_test3:
        leaq (,%rdi,4), %rax
        orq %rdi, %rax
        ret

instead of:
_test2:
        movq %rdi, %rax
        shlq $2, %rax
        orq %rdi, %rax
        ret

llvm-svn: 35434

llvm-svn: 35430

llvm-svn: 35394

system assembler not groking legal instructions like "leal (,%esi,8), %ecx".

llvm-svn: 35393

llvm-svn: 35392

the MMX instructions that are needed...

llvm-svn: 35389

comparison operators.

llvm-svn: 35385

llvm-svn: 35353

llvm-svn: 35352

#include <mmintrin.h>

extern __m64 C;

void baz(__v2si *A, __v2si *B)
{
  *A = C;
  _mm_empty();
}

We get this:

_baz:
        call "L1$pb"
"L1$pb":
        popl %eax
        movl L_C$non_lazy_ptr-"L1$pb"(%eax), %eax
        movq (%eax), %mm0
        movl 4(%esp), %eax
        movq %mm0, (%eax)
        emms
        ret

GCC gives us this:

_baz:
        pushl   %ebx
        call    L3
"L00000000001$pb":
L3:
        popl    %ebx
        subl    $8, %esp
        movl    L_C$non_lazy_ptr-"L00000000001$pb"(%ebx), %eax
        movl    (%eax), %edx
        movl    4(%eax), %ecx
        movl    16(%esp), %eax
        movl    %edx, (%eax)
        movl    %ecx, 4(%eax)
        emms
        addl    $8, %esp
        popl    %ebx
        ret

llvm-svn: 35351

not just the first letter.  No functionality change.

llvm-svn: 35322

Allow the b/h/w/k constraints to be applied to values that have multiple alternatives, and end up not being registers.

llvm-svn: 35320

llvm-svn: 35319

llvm-svn: 35318

llvm-svn: 35292

Add final support to get the QT example to compile.

llvm-svn: 35290

intrinsic.

llvm-svn: 35269

llvm-svn: 35266