Make post-ra scheduling, anti-dep breaking, and register scavenger (conservatively) aware of predicated instructions. This enables ARM to move if-conversion before post-ra scheduler.

llvm-svn: 106091

and End arguments by-value rather than by-reference.

llvm-svn: 101830

multiple register definitions.

llvm-svn: 92864

llvm-svn: 92837

Remove some old experimental code that is no longer needed. Remove additional, speculative scheduling pass as its cost did not translate into significant performance improvement. Minor tweaks.

llvm-svn: 89471

Do a scheduling pass ignoring anti-dependencies to identify candidate registers that should be renamed.

llvm-svn: 85939

llvm-svn: 85412

Allow the aggressive anti-dep breaker to process the same region multiple times. This is necessary because new anti-dependencies are exposed when "current" ones are broken.

llvm-svn: 85166

llvm-svn: 85127