for earlyclobbers.  Teach Local RA about earlyclobber,
and add some tests for it.

llvm-svn: 56592

llvm-svn: 56584

llvm-svn: 56583

llvm-svn: 56579

llvm-svn: 56575

llvm-svn: 56574

llvm-svn: 56573

llvm-svn: 56572

llvm-svn: 56571

llvm-svn: 56567

llvm-svn: 56553

llvm-svn: 56552

llvm-svn: 56551

the SelectionDAG and DAGCombiner code. The only functionality change is that now
the DAG combiner is performing the constant folding for these operations instead
of being a no-op.

This is *not* in response to a bug, so there isn't a testcase.

llvm-svn: 56550

RA problem by expanding the live interval of an
earlyclobber def back one slot.  Remove
overlap-earlyclobber throughout.  Remove 
earlyclobber bits and their handling from
live internals.

llvm-svn: 56539

separate method.

llvm-svn: 56531

dead loads.

llvm-svn: 56529

any volatile memory references.

llvm-svn: 56528

Properly handle 'm' inline asm constraints. If a GV is being selected for the addressing mode, it requires the same logic for PIC relative addressing, etc.

llvm-svn: 56526

llvm-svn: 56513

correctly, it's not necessary to explicitly remove registers
from their use-def lists.

llvm-svn: 56509

object. This will be needed to support debug info.

llvm-svn: 56508

efficient implementation possible, but it's pretty simple and
good enough for the time being.

llvm-svn: 56504

track of the number of live registers, which is all the set was
being used for.

llvm-svn: 56498

llvm-svn: 56485

load address has an offset from the base of the constant pool
entry.

llvm-svn: 56479

llvm-svn: 56476

llvm-svn: 56475

just use LI::MergeValueAsValue, as its behavior in the presence of overlapping ranges
isn't what StrongPHIElimination wants.

llvm-svn: 56472

default.

llvm-svn: 56471

llvm-svn: 56469

llvm-svn: 56468

llvm-svn: 56456

(srl x, (trunc (and y, c))) -> (srl x, (and (trunc y), c))
etc. when both "trunc" and "and" have single uses.

llvm-svn: 56452

llvm-svn: 56419

llvm-svn: 56418

Handle{Virt,Phys}Reg{Def,Use}. Remove a redundant check
for register zero, and redundant checks for isPhysicalRegister.

llvm-svn: 56412

correct in the presence of things like EH labels.

llvm-svn: 56410

llvm-svn: 56399

Check bits for preferred register.

llvm-svn: 56384