The MCStreamer based assemblers will take over for this functionality.

llvm-svn: 95033

LoopStrengthReduce, as it's causing too much trouble (even with the
old LoopStrengthReduce code).

llvm-svn: 94172

they reach codegen.

llvm-svn: 94066

the -pre-regalloc-taildup command-line option, and add a new
-disable-early-taildup option.

llvm-svn: 93597

Remove most of old Mach-O Writer support, it has been replaced by MCMachOStreamer

Further refactoring to completely remove MachOWriter and drive the object file
writer with the AsmPrinter MCInst/MCSection logic is forthcoming.

llvm-svn: 93527

llvm-svn: 93459

catch info can get misplaced when a selector ends up more than one block
removed from the parent invoke(s). This could happen when a landing pad is
shared by multiple invokes and is also a target of a normal edge from
elsewhere.

llvm-svn: 93456

llvm-svn: 93313

llvm-svn: 93286

llvm-svn: 93285

Add a quick pass to optimize sign / zero extension instructions. For targets where the pre-extension values are available in the subreg of the result of the extension, replace the uses of the pre-extension value with the result + extract_subreg.

For now, this pass is fairly conservative. It only perform the replacement when both the pre- and post- extension values are used in the block. It will miss cases where the post-extension values are live, but not used.

llvm-svn: 93278

llvm-svn: 92874

Change errs() to dbgs().

llvm-svn: 92524

by allowing backends to override routines that will default
the JIT and Static code generation to an appropriate code model
for the architecture.

Should fix PR 5773.

llvm-svn: 91824

llvm-svn: 91604

Revert 91280-91283, 91286-91289, 91291, 91293, 91295-91296. It apparently introduced a non-deterministic behavior in the optimizer somewhere.

llvm-svn: 91598

llvm-svn: 90567

llvm-svn: 89968

running tail duplication when doing branch folding for if-conversion, and
we also want to be able to run tail duplication earlier to fix some
reg alloc problems.  Move the CanFallThrough function from BranchFolding
to MachineBasicBlock so that it can be shared by TailDuplication.

llvm-svn: 89904

llvm-svn: 89790

just before codegen.

llvm-svn: 89439

llvm-svn: 86092

llvm-svn: 86044

previously running CodePlacementOpt. Also print headers before
each dump in -print-machineinstrs mode, so that it's clear which
dump is which.

llvm-svn: 85681

to unfold loop-invariant loads.

llvm-svn: 85657

llvm-svn: 85460

--- Reverse-merging r85338 into '.':
U    lib/CodeGen/SimpleRegisterCoalescing.cpp
U    lib/CodeGen/SimpleRegisterCoalescing.h

llvm-svn: 85454

I'm going to redo this using the OptimizeForSize function attribute.

llvm-svn: 85426

use it to control tail merging when there is a tradeoff between performance
and code size.  When there is only 1 instruction in the common tail, we have
been merging.  That can be good for code size but is a definite loss for
performance.  Now we will avoid tail merging in that case when the
optimization level is "Aggressive", i.e., "-O3".  Radar 7338114.

Since the IfConversion pass invokes BranchFolding, it too needs to know
the optimization level.  Note that I removed the RegisterPass instantiation
for IfConversion because it required a default constructor.  If someone
wants to keep that for some reason, we can add a default constructor with
a hard-wired optimization level.

llvm-svn: 85346

llvm-svn: 84273

llvm-svn: 83144

Remove -post-RA-schedule flag and add a TargetSubtarget method to enable post-register-allocation scheduling. By default it is off. For ARM, enable/disable with -mattr=+/-postrasched. Enable by default for cortex-a8.

llvm-svn: 83122

llvm-svn: 82803

constants out of loops. These aren't covered by the regular LICM
pass, because in LLVM IR constants don't require separate
instructions. They're not always covered by the MachineLICM pass
either, because it doesn't know how to unfold folded constant-pool
loads. This is somewhat experimental at this point, and off by
default.

llvm-svn: 82076

llvm-svn: 80104

upgrading a few things to use raw_ostream

llvm-svn: 79811

llvm-svn: 79763

more properly belong. This allows removing the front-end conditionalized
SJLJ code, and cleans up the generated IR considerably. All of the
infrastructure code (calling _Unwind_SjLj_Register/Unregister, etc) is
added by the SjLjEHPrepare pass.

llvm-svn: 79250

llvm-svn: 79095

AsmPrinter instance (instead of just a FunctionPass)

llvm-svn: 78962