moves. This avoids the need to promote the operands (or implicitly
extend them, a partial register update condition), and can reduce
i8 register pressure. This substantially speeds up code such as
write_hex in lib/Support/raw_ostream.cpp.

subclass-coalesce.ll is too trivial and no longer tests what it was
originally intended to test.

llvm-svn: 80184

leads to partial-register definitions. To help avoid redundant
zero-extensions, also teach the h-register matching patterns that
use movzbl to match anyext as well as zext.

llvm-svn: 80099

llvm-svn: 80012

llvm-svn: 79961

llvm-svn: 79873

llvm-svn: 79853

llvm-svn: 79834

MachineInstr and MachineOperand.  This required eliminating a
bunch of stuff that was using DOUT, I hope that bill doesn't
mind me stealing his fun. ;-)

llvm-svn: 79813

llvm-svn: 79780

llvm-svn: 79777

llvm-svn: 79773

llvm-svn: 79763

llvm-svn: 79742

llvm-svn: 79634

Intel documentation.

llvm-svn: 79554

over absolute addressing even in non-PIC mode (unless the address
has an index or something else incompatible), because it has a
smaller encoding.

llvm-svn: 79553

llvm-svn: 79495

llvm-svn: 79494

llvm-svn: 79484

llvm-svn: 79443

a smaller encoding. These kinds of patterns are very frequent in
sqlite3, for example.

llvm-svn: 79439

talk to the MCStreamer directly instead.

llvm-svn: 79405

Add patterns and instruction encoding information.
Add custom lowering to deal with hardwired return register of
uncertain type (xmm0).

llvm-svn: 79377

llvm-svn: 79321

send instructions like:

NEW: 	movl	"L___stack_chk_guard$non_lazy_ptr" - "L1$pb"(%esi), %eax
OLD: 	movl	L___stack_chk_guard$non_lazy_ptr-"L1$pb"(%esi), %eax

through the streamer.  Several fixmes.

llvm-svn: 79317

returns a log2 value.

llvm-svn: 79293

just remove the argument and replace it with 1.

llvm-svn: 79246

or some other situation where no xmm registers need to be saved.

llvm-svn: 79207

llvm-svn: 79187

llvm-svn: 79175

can asmprint:

NEW: 	movl	"L___stack_chk_guard$non_lazy_ptr", %eax
OLD: 	movl	L___stack_chk_guard$non_lazy_ptr, %eax

where 'new' is coming out of the MCInst version of the printer.

llvm-svn: 79170

llvm-svn: 79167

llvm-svn: 79165

what was there before. In "no FP mode", we weren't generating labels and unwind
table entries after each "push" instruction. While more than likely "okay", it's
not technically correct. The major thing was that the ordering of when to define
a new CFA register and at what offset wasn't correct. This would cause the
exception handling to fail in ways most miserable to users.

I also cleaned up some code a bit. There's one function which has a "return" at
the beginning, so it's never used. Should I just remove it? :-)

llvm-svn: 79139

llvm-svn: 79136

llvm-svn: 79135

support unaligned mem access only for certain types. (Should it be size
instead?)

ARM v7 supports unaligned access for i16 and i32, some v6 variants support it
as well.

llvm-svn: 79127

the register save area if %al is 0. This avoids touching xmm
regsiters when they aren't actually used.

llvm-svn: 79061

llvm-svn: 79030

llvm-svn: 79009