Separate AVXCC and SSECC printing for cmpps/pd/ss/sd and add masking before the switch statement. This keeps the unreachable default case from being hit if the instruction was created with an intrinsic with too large of an immediate.

llvm-svn: 165483

In parseMSRMaskOperand, add an explicit check for the operand being an identifier instead of just having an assert.

llvm-svn: 165480

Remove some dead code from ARMAsmPrinter. Add virtual and LLVM_OVERRIDE to the other methods. Mark some of the helper methods as private.

llvm-svn: 165479

Remove some unused code in the X86AsmPrinter. Add LLVM_OVERRIDE and virtual keywords to the remaining interface methods.

llvm-svn: 165478

Thanks to Benjamin for the raw test case. This one took about 50 times
longer to reduce than to fix. =/

llvm-svn: 165476

llvm-svn: 165469

llvm-svn: 165468

llvm-svn: 165467

No functionality change intended.

llvm-svn: 165466

llvm-svn: 165465

llvm-svn: 165463

llvm-svn: 165458

Refactor the AddrMode class out of TLI to its own header file.
This class is used by LSR and a number of places in the codegen.
This is the first step in de-coupling LSR from TLI, and creating
a new interface in between them.

llvm-svn: 165455

attributes objects.

llvm-svn: 165436

the same thing. No functionality change.

llvm-svn: 165435

When the CFG contains a loop with multiple entry blocks, the traces
computed by MachineTraceMetrics don't always have the same nice
properties. Loop back-edges are normally excluded from traces, but
MachineLoopInfo doesn't recognize loops with multiple entry blocks, so
those back-edges may be included.

Avoid asserting when that happens by adding an isEarlierInSameTrace()
function that accurately determines if a dominating block is part of the
same trace AND is above the currrent block in the trace.

llvm-svn: 165434

Start using the AttributesImpl object to hold the value of the attributes. All
queries go through the interfaces now.

This has one unfortunate consequence. I needed to move the AttributesImpl.h file
into include/llvm. But this is only temporary! Otherwise, the changes needed to
support this would be too large.

llvm-svn: 165433

be emitted if they're wanted on elf platforms.

llvm-svn: 165432

llvm-svn: 165427

llvm-svn: 165426

Vector compare using altivec 'vcmpxxx' instructions have as third argument
a vector register instead of CR one, different from integer and float-point
compares. This leads to a failure in code generation, where 'SelectSETCC'
expects a DAG with a CR register and gets vector register instead.

This patch changes the behavior by just returning a DAG with the 
vector compare instruction based on the type. The patch also adds a testcase
for all vector types llvm defines.

It also included a fix on signed 5-bits predicates printing, where
signed values were not handled correctly as signed (char are unsigned by
default for PowerPC). This generates 'vspltisw' (vector splat)
instruction with SIM out of range.

llvm-svn: 165419

llvm-svn: 165418

llvm-svn: 165417

llvm-svn: 165416

llvm-svn: 165411

This patch add altivec support for v4i32 to v4f32 and for v4f32 to
v4i32 vector rounding conversion.

llvm-svn: 165409

llvm-svn: 165402

llvm-svn: 165382

llvm-svn: 165381

Otherwise it will try to use SSE patterns and fail horribly if sse is disabled.
Fixes PR14035.

llvm-svn: 165377

contents of the Attributes class over to an AttributesImpl.

llvm-svn: 165373

Without this change, when the estimated cost for inlining a function with
an "alwaysinline" attribute was lower than the inlining threshold, the
getInlineCost function was returning that estimated cost rather than the
special InlineCost::AlwaysInlineCost value. That is fine in the normal
inlining case, but it can fail when the inliner considers the opportunity
cost of inlining into an internal or linkonce-odr function. It may decide
not to inline the always-inline function in that case. The fix here is just
to make getInlineCost always return the special value for always-inline
functions. I ran into this building clang with libc++. Tablegen failed to
link because of an always-inline function that was not inlined. I have been
unable to reduce the testcase down to a reasonable size.

llvm-svn: 165367

move from and to coprocessors 0 and 2.

Contributer: Vladimir Medic
llvm-svn: 165351

Contributer: Vladimir Medic
llvm-svn: 165350

Contributer: Vladimir Medic
llvm-svn: 165346

into separate versions for the Darwin and 64-bit SVR4 ABIs.  This will
facilitate doing more major surgery on the 64-bit SVR4 ABI in the near future.

llvm-svn: 165336

llvm-svn: 165331

llvm-svn: 165324

llvm-svn: 165322

No functionality change.

llvm-svn: 165321