1) DIContext is now able to return function name for a given instruction address (besides file/line info).
2) llvm-dwarfdump accepts flag --functions that prints the function name (if address is specified by --address flag).
3) test case that checks the basic functionality of llvm-dwarfdump added

llvm-svn: 159512

implicit_def, the other instruction can be anything, including instructions
that define multiple values. Be careful about that and don't assume what operand
0 is.
Fixes pr13249.

llvm-svn: 159509

llvm-svn: 159504

Reduce code size by using a second switch statement to avoid extra calls to SelectAtomic64. Also catch cases where SelectAtomic64 fails.

llvm-svn: 159503

llvm-svn: 159502

Fix a crash on release builds if gather intrinsics are passed a non-constant value for the last argument.

llvm-svn: 159501

Use a second switch statement to reduce number of calls to SelectGather in code. Reduces code size a bit.

llvm-svn: 159500

No functionality change.

llvm-svn: 159497

llvm-svn: 159491

re-used. Also, build in direct support for accumulating a set of lit
parameters, arguments, and testsuites to run as part of a 'check-all'
rule. This sinks 'check-all' from a Clang-specific construct to
a generic construct of the project.

llvm-svn: 159482

llvm-svn: 159481

a reduced testcase, but this fixes pr13209.

llvm-svn: 159479

llvm-svn: 159471

Use getUniqueVRegDef.
Replace a loop with existing interfaces: modifiesRegister and readsRegister.
Factor out code into inline functions and simplify the code.

llvm-svn: 159470

instructions with two register operands.

llvm-svn: 159465

When a local virtual register is made global, make sure to clear any
existing kill flags.

llvm-svn: 159461

This would previously get reported as the misleading "Virtual register
def doesn't dominate all uses."

llvm-svn: 159460

This happens when codegenprepare is invoked via opt.

llvm-svn: 159457

This comes in handy during peephole optimization.

llvm-svn: 159453

really happening.  No intended functionality change.

llvm-svn: 159451

RefreshCallGraph: ignore 'invoke intrinsic'. IntrinsicInst doesnt not recognize invoke, and shouldnt at this point, since the rest of LLVM codebase doesnt expect invoke of intrinsics

llvm-svn: 159441

ignore 'invoke new' in isInstructionTriviallyDead, since most callers are not ready to handle invokes. instcombine will take care of this.

llvm-svn: 159440

llvm-svn: 159433

the optimizers producing a multiply expression with more multiplications than
the original (!).

llvm-svn: 159426

This was always part of the VMCore library out of necessity -- it deals
entirely in the IR. The .cpp file in fact was already part of the VMCore
library. This is just a mechanical move.

I've tried to go through and re-apply the coding standard's preferred
header sort, but at 40-ish files, I may have gotten some wrong. Please
let me know if so.

I'll be committing the corresponding updates to Clang and Polly, and
Duncan has DragonEgg.

Thanks to Bill and Eric for giving the green light for this bit of cleanup.

llvm-svn: 159421

llvm-svn: 159417

llvm-svn: 159416

(a.k.a. MDNodes). The module doesn't belong in Analysis. Move it to the VMCore
instead.

llvm-svn: 159414

This reverts commit r159406. I noticed a performance regression so I'll back out for now.

llvm-svn: 159411

Before this patch in pic 32 bit code we would add the global base register
and not load from that address. This is a really old bug, but before the
introduction of the tls attributes we would never select initial exec for
pic code.

llvm-svn: 159409

llvm-svn: 159408

llvm-svn: 159407

The TargetInstrInfo::getNumMicroOps API does not change, but soon it
will be used by MachineScheduler. Now each subtarget can specify the
number of micro-ops per itinerary class. For ARM, this is currently
always dynamic (-1), because it is used for load/store multiple which
depends on the number of register operands.

Zero is now a valid number of micro-ops. This can be used for
nop pseudo-instructions or instructions that the hardware can squash
during dispatch.

llvm-svn: 159406

Corrected type for index of llvm.x86.avx2.gather.d.pd.256
  from 256-bit to 128-bit.
Corrected types for src|dst|mask of llvm.x86.avx2.gather.q.ps.256
  from 256-bit to 128-bit.

Support the following intrinsics:
  llvm.x86.avx2.gather.d.q, llvm.x86.avx2.gather.q.q
  llvm.x86.avx2.gather.d.q.256, llvm.x86.avx2.gather.q.q.256
  llvm.x86.avx2.gather.d.d, llvm.x86.avx2.gather.q.d
  llvm.x86.avx2.gather.d.d.256, llvm.x86.avx2.gather.q.d.256

llvm-svn: 159402

Clang has been getting along fine without this for quite some time.

llvm-svn: 159400

only used in the Clang tree, but it seems reasonable to support.

llvm-svn: 159399

the assert reported in PR13228!

llvm-svn: 159393

While at it, merge 2 tests and FileCheckize them

llvm-svn: 159388

llvm-svn: 159385

llvm-svn: 159384