llvm-svn: 37092

llvm-svn: 37089

llvm-svn: 37086

llvm-svn: 37084

llvm-svn: 37071

test/CodeGen/ARM/2007-05-14-InlineAsmCstCrash.ll

llvm-svn: 37069

llvm-svn: 37064

CodeGen/PowerPC/fneg.ll into:

_t4:
        fmul f0, f3, f4
        fmadd f1, f1, f2, f0
        blr

instead of:

_t4:
        fneg f0, f3
        fmul f0, f0, f4
        fmsub f1, f1, f2, f0
        blr

llvm-svn: 37054

llvm-svn: 37052

v1 =
r2 = move v1
   = op r2<kill>
...
r2 = move v1
   = op r2<kill>

Clear the first r2 kill if v1 and r2 are joined.

llvm-svn: 37050

When marking a register as being implicitly defined, make sure to clear its partial use info as well.

llvm-svn: 37046

just aids in readability and debugability of the output. No functional change.

llvm-svn: 37037

Emit function debug frames in one atom. This will prevent us from generating incorrect assembler in case of both
debug information & exception information presented.

llvm-svn: 37019

functions. This partly fixes PR1414: now we're restricted only to one
personality function per eh frame, not per module. Further work on
"multiple personalities" topic needs representative example.

llvm-svn: 37018

1. Fix PR1380
2. Apply Duncan's patch from PR1410
3. Insert workaround for "one personality function per module" as noted in PR1414
4. Emit correct debug frames for x86/linux. This partly fixes DebugInfo/2006-11-06-StackTrace.cpp: stack trace is
shown correctly, but arguments for function on top of stack are displayed incorrectly.

llvm-svn: 37015

llvm-svn: 37006

llvm-svn: 36998

llvm-svn: 36988

llvm-svn: 36987

failures on PPC (can happen only when prologue code is null)

llvm-svn: 36979

llvm-svn: 36978

llvm-svn: 36977

llvm-svn: 36975

llvm-svn: 36974

llvm-svn: 36966

llvm-svn: 36962

Do not assert, when case range split metric is zero and JTs are not allowed: just emit binary tree in this case. This
fixes PR1403.

llvm-svn: 36959

certain linkers...

llvm-svn: 36944

llvm-svn: 36943

llvm-svn: 36910

- (store (bitconvert v)) -> (store v) if resultant store does not require
higher alignment
- (bitconvert (load v)) -> (load (bitconvert*)v) if resultant load does not
require higher alignment

llvm-svn: 36908

llvm-svn: 36907

attribute index being used.  Fix proposed by Anton Korobeynikov, who
asked me to implement and commit it for him.  This is PR1398.

llvm-svn: 36906

llvm-svn: 36891

llvm-svn: 36873

hardwiring in the C++ one.

llvm-svn: 36789

Implement support for expanding a bitcast from an illegal vector type to
a legal one (e.g. 4xi32 -> 4xf32 in SSE1).  This fixes PR1371 and
CodeGen/X86/2007-05-05-VecCastExpand.ll

llvm-svn: 36787

llvm-svn: 36781

some small cleanup was made.

llvm-svn: 36780

handle this case too.

llvm-svn: 36745