http://llvm.org/bugs/show_bug.cgi?id=12343

We have not trivial way for splitting edges that are goes from indirect branch. We can do it with some tricks, but it should be additionally discussed. And it is still dangerous due to difficulty of indirect branches controlling.

Fix forbids this case for unswitching.

llvm-svn: 153879

llvm-svn: 153878

objective-c's fragile abi, Use -rewrite-objc for translating 
objective-c's modern abi.  // rdar://11143173

llvm-svn: 153877

llvm-svn: 153876

llvm-svn: 153875

llvm-svn: 153874

Fix test for default constructor of discrete_distribution.  This partially addresses http://llvm.org/bugs/show_bug.cgi?id=12436.

llvm-svn: 153873

llvm-svn: 153872

llvm-svn: 153871

reflected in the LLVM IR (as a declare or something), then treat it like a data
object.

N.B. This isn't 100% correct. The ASM parser should supply more information so
that we know what type of object it is, and what attributes it should have.

llvm-svn: 153870

This way we can get AVX v-prefixed instructions tail merged with the normal insns.

llvm-svn: 153869

with some archs, tweak the way we update PATH to fix that.

llvm-svn: 153868

All implementations used the same code.

llvm-svn: 153866

Reorder fields in MatchEntry and OperandMatchEntry to reduce padding. A bit tricky due to the target specific sizes for some of the fields so the ordering is only optimal for the targets in the tree.

llvm-svn: 153865

Do not try to optimize swizzles of shuffles if the source shuffle has more than
a single user, except when the source shuffle is also a swizzle.

llvm-svn: 153864

Remove getInstructionName from MCInstPrinter implementations in favor of using the instruction name table from MCInstrInfo. Reduces static data in the InstPrinter implementations.

llvm-svn: 153863

Patch by Jeremy Huddleston!

llvm-svn: 153862

llvm-svn: 153861

Make MCInstrInfo available to the MCInstPrinter. This will be used to remove getInstructionName and the static data it contains since the same tables are already in MCInstrInfo.

llvm-svn: 153860

definition for it. In that case, we want to wait for the potential definition
before we create a symbol for it.

llvm-svn: 153859

dependent contexts.

llvm-svn: 153858

llvm-svn: 153857

This is an initial commit of constexpr support as proposed by Richard Smith.  This by no means completes constexpr support.  Indeed, it hardly scratches the surface.  All it does is lay the foundation in <__config> and changes those few places in the library that are already using that foundation.

llvm-svn: 153856

I believe tuple is still under development in the standard.  Daniel Krugler is/will be making convincing arguments that a modified form of LWG 2051 (currently NAD Future) is easily acheivable and desirable.  He has demonstrated that a tuple<T...> where all of the T are implicitly convertible from U... should have a tuple constructor that is also implicit, instead of explicit.  This would support the use cases in LWG 2051 while not undermining T... with explicit conversions from U....  This check-in is an experimental implementation of Daniel's work.  I believe this work to be mature enough to warrant inclusion into libc++.  If anyone sees real-world problems that this check in causes, please let me know and I will revert it, and provide the feedback to the LWG.

llvm-svn: 153855

llvm-gcc doesn't handle --serialize-diagnostics so when compiling i386
kernel/kext code with -Werror, you get an error about that option being
unused.  Claim the argument to prevent this from breaking builds.
<rdar://problem/11161933>

llvm-svn: 153854

rather than a bitfield, a great suggestion by Chris during code review.

There is still quite a bit of cruft in the interface, but that requires
sorting out some awkward uses of the cost inside the actual inliner.

No functionality changed intended here.

llvm-svn: 153853

llvm-svn: 153852

llvm-svn: 153851

llvm-svn: 153850

llvm-svn: 153849

1. Simplify xor/and/or (bitcast(A), bitcast(B)) -> bitcast(op (A,B))
   (and also scalar_to_vector).

2. Xor/and/or are indifferent to the swizzle operation (shuffle of one src).
   Simplify xor/and/or (shuff(A), shuff(B)) -> shuff(op (A, B))

3. Optimize swizzles of shuffles:  shuff(shuff(x, y), undef) -> shuff(x, y).

4. Fix an X86ISelLowering optimization which was very bitcast-sensitive.

Code which was previously compiled to this:

movd    (%rsi), %xmm0
movdqa  .LCPI0_0(%rip), %xmm2
pshufb  %xmm2, %xmm0
movd    (%rdi), %xmm1
pshufb  %xmm2, %xmm1
pxor    %xmm0, %xmm1
pshufb  .LCPI0_1(%rip), %xmm1
movd    %xmm1, (%rdi)
ret

Now compiles to this:

movl    (%rsi), %eax
xorl    %eax, (%rdi)
ret

llvm-svn: 153848

Analyzer: Store BugReports directly in a ilist instead of adding another layer of inderection with std::list

llvm-svn: 153847

llvm-svn: 153846

The 440 and A2 cores have detailed itineraries, and this allows them to be
fully used to maximize throughput.

llvm-svn: 153845

llvm-svn: 153844

Post-RA scheduling gives a significant performance improvement on
the embedded cores, so turn it on. Using full anti-dep. breaking is
important for FP-intensive blocks, so turn it on (just on the
embedded cores for now; this should also be good on the 970s because
post-ra scheduling is all that we have for now, but that should have
more testing first).

llvm-svn: 153843

This adds a full itinerary for IBM's PPC64 A2 embedded core. These
cores form the basis for the CPUs in the new IBM BG/Q supercomputer.

llvm-svn: 153842

Use SequenceToOffsetTable to create instruction name table. Saves space particularly on X86 where AVX instructions just add a 'v' to the front of other instructions.

llvm-svn: 153841

llvm-svn: 153840

llvm-svn: 153839