- Feb 03, 2012
-
-
Jakob Stoklund Olesen authored
SelectionDAG has 4 different ways of passing physreg defs to users. Collect all of the uses at the same time, and pass all of them to MI->setPhysRegsDeadExcept() to mark the remaining defs dead. The setPhysRegsDeadExcept() function will soon add the required implicit-defs to instructions with register mask operands. llvm-svn: 149708
-
Andrew Trick authored
llvm-svn: 149705
-
Nadav Rotem authored
The type-legalizer often scalarizes code. One of the common patterns is extract-and-truncate. In this patch we optimize this pattern and convert the sequence into extract op of a narrow type. This allows the BUILD_VECTOR dag optimizations to construct efficient shuffle operations in many cases. llvm-svn: 149692
-
Andrew Trick authored
Allows command line overrides to be centralized in LLVMTargetMachine.cpp. LLVMTargetMachine can intercept common passes and give precedence to command line overrides. Allows adding "internal" target configuration options without touching TargetOptions. Encapsulates the PassManager. Provides a good point to initialize all CodeGen passes so that Pass ID's can be used in APIs. Allows modifying the target configuration hooks without rebuilding the world. llvm-svn: 149672
-
Andrew Trick authored
llvm-svn: 149671
-
Akira Hatanaka authored
needed to emit a 64-bit gp-relative relocation entry. Make changes necessary for emitting jump tables which have entries with directive .gpdword. This patch does not implement the parts needed for direct object emission or JIT. llvm-svn: 149668
-
Jakob Stoklund Olesen authored
It doesn't seem worthwhile to give meaning to a NULL register mask pointer. It complicates all the code using register mask operands. llvm-svn: 149646
-
- Feb 02, 2012
-
-
Lang Hames authored
Re-apply the coalescer fix from r149147. Commit r149597 should have fixed the llvm-gcc and clang self-host issues. llvm-svn: 149598
-
Lang Hames authored
llvm-svn: 149596
-
Lang Hames authored
more than two adjacent ranges needed to be merged. The new version should be able to handle an arbitrary sequence of adjancent ranges. llvm-svn: 149588
-
- Feb 01, 2012
-
-
Andrew Trick authored
llvm-svn: 149553
-
Andrew Trick authored
This new scheduler plugs into the existing selection DAG scheduling framework. It is a top-down critical path scheduler that tracks register pressure and uses a DFA for pipeline modeling. Patch by Sergei Larin! llvm-svn: 149547
-
Stepan Dyatkovskiy authored
The purpose of refactoring is to hide operand roles from SwitchInst user (programmer). If you want to play with operands directly, probably you will need lower level methods than SwitchInst ones (TerminatorInst or may be User). After this patch we can reorganize SwitchInst operands and successors as we want. What was done: 1. Changed semantics of index inside the getCaseValue method: getCaseValue(0) means "get first case", not a condition. Use getCondition() if you want to resolve the condition. I propose don't mix SwitchInst case indexing with low level indexing (TI successors indexing, User's operands indexing), since it may be dangerous. 2. By the same reason findCaseValue(ConstantInt*) returns actual number of case value. 0 means first case, not default. If there is no case with given value, ErrorIndex will returned. 3. Added getCaseSuccessor method. I propose to avoid usage of TerminatorInst::getSuccessor if you want to resolve case successor BB. Use getCaseSuccessor instead, since internal SwitchInst organization of operands/successors is hidden and may be changed in any moment. 4. Added resolveSuccessorIndex and resolveCaseIndex. The main purpose of these methods is to see how case successors are really mapped in TerminatorInst. 4.1 "resolveSuccessorIndex" was created if you need to level down from SwitchInst to TerminatorInst. It returns TerminatorInst's successor index for given case successor. 4.2 "resolveCaseIndex" converts low level successors index to case index that curresponds to the given successor. Note: There are also related compatability fix patches for dragonegg, klee, llvm-gcc-4.0, llvm-gcc-4.2, safecode, clang. llvm-svn: 149481
-
Argyrios Kyrtzidis authored
These are: r149348 r149351 r149352 r149354 r149356 r149357 r149361 r149362 r149364 r149365 llvm-svn: 149470
-
- Jan 31, 2012
-
-
Andrew Trick authored
llvm-svn: 149398
-
Chris Lattner authored
with recent changes, ConstantArray is never a "string". Remove the associated methods and constant fold the clients to false. llvm-svn: 149362
-
Andrew Trick authored
This removes implicit assumption about the form of MI coming into regalloc. In particular, it should be independent of ProcessImplicitDefs which will eventually become a standard part of coming out of SSA--unless we simply can eliminate IMPLICIT_DEF completely. Current unit tests expose this once I remove incidental pass ordering restrictions. This is not a final fix. Just a temporary workaround until I figure out the right way. llvm-svn: 149360
-
Chris Lattner authored
llvm-svn: 149356
-
Chris Lattner authored
which is going away. llvm-svn: 149348
-
Chris Lattner authored
CodeGen/X86/global-sections.ll to fail with CDArray llvm-svn: 149343
-
Bill Wendling authored
llvm-svn: 149331
-
Bill Wendling authored
over the catch information. The catch information is now tacked to the invoke instruction. llvm-svn: 149326
-
Eli Friedman authored
Use the correct ShiftAmtTy for creating shifts after legalization. PR11881. Not committing a testcase because I think it will be too fragile. llvm-svn: 149315
-
Chandler Carruth authored
vectors of all one bits to be printed more cleverly in the AsmPrinter. Unfortunately, the byte value for all one bits is the same with -fsigned-char as the error return of '-1'. Force this to be the unsigned byte value when returning it to avoid this problem, and update the test case for the shiny new behavior. Yay for building LLVM and Clang with -funsigned-char. Chris, please review, and let me know if there is any reason to not desire this change. It seems good on the surface, and certainly intended based on the code written. llvm-svn: 149299
-
- Jan 30, 2012
-
-
Matt Beaumont-Gay authored
*function*. Wrap the function in #ifndef NDEBUG. llvm-svn: 149259
-
Chris Lattner authored
like normal integers. llvm-svn: 149223
-
Chris Lattner authored
llvm-svn: 149222
-
- Jan 29, 2012
-
-
Jakob Stoklund Olesen authored
- Don't call malloc+free in the very hot forward(). - Don't call isTiedToDefOperand(). - Don't create BitVector temporaries. - Merge DeadRegs into KillRegs. - Eliminate the early clobber checks, they were irrelevant to scavenging. - Remove unnecessary code from -Asserts builds. This speeds up ARM PEI by 3.4x and overall llc -O0 codegen time by 11%. llvm-svn: 149189
-
Jakob Stoklund Olesen authored
llvm-svn: 149188
-
- Jan 28, 2012
-
-
Bill Wendling authored
llvm-svn: 149164
-
Lang Hames authored
llvm-svn: 149163
-
Bill Wendling authored
llvm-svn: 149162
-
Bill Wendling authored
Sometimes there is only one 'resume' instruction per function. In those situations, we don't need a separate block for the call to _Unwind_Resume. In fact, it adds a lot of overhead to code-gen if we do that -- especially at -O0. If we have a single 'resume' instruction, just generate the call within that block. <rdar://problem/10694814> llvm-svn: 149159
-
Lang Hames authored
llvm-svn: 149152
-
- Jan 27, 2012
-
-
Lang Hames authored
around within a basic block while maintaining live-intervals. Updated ScheduleTopDownLive in MachineScheduler.cpp to use the moveInstr API when reordering MIs. llvm-svn: 149147
-
Lang Hames authored
llvm-svn: 149146
-
Lang Hames authored
llvm-svn: 149144
-
Lang Hames authored
llvm-svn: 149118
-
Chris Lattner authored
we should (theoretically optimize and codegen ConstantDataVector as well as ConstantVector. llvm-svn: 149116
-
Bill Wendling authored
GEP instructions are there for the compiler and shouldn't really output much code (if any at all). When a GEP is stored in the entry block, Fast ISel (for one) will not know that it could fold it into further uses. For instance, inside of the EH handling code. This results in a lot of unnecessary spills and loads which bloat code and slows down pretty much everything. <rdar://problem/10694814> llvm-svn: 149114
-