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  1. Feb 03, 2012
    • Jakob Stoklund Olesen's avatar
      Handle all live physreg defs in the same place. · f650732c
      Jakob Stoklund Olesen authored
      SelectionDAG has 4 different ways of passing physreg defs to users.
      Collect all of the uses at the same time, and pass all of them to
      MI->setPhysRegsDeadExcept() to mark the remaining defs dead.
      
      The setPhysRegsDeadExcept() function will soon add the required
      implicit-defs to instructions with register mask operands.
      
      llvm-svn: 149708
      f650732c
    • Andrew Trick's avatar
    • Nadav Rotem's avatar
      · 5399f4d6
      Nadav Rotem authored
      The type-legalizer often scalarizes code. One of the common patterns is extract-and-truncate.
      In this patch we optimize this pattern and convert the sequence into extract op of a narrow type.
      This allows the BUILD_VECTOR dag optimizations to construct efficient shuffle operations in many cases.
      
      llvm-svn: 149692
      5399f4d6
    • Andrew Trick's avatar
      Added TargetPassConfig. The first little step toward configuring codegen passes. · ccb67365
      Andrew Trick authored
      Allows command line overrides to be centralized in LLVMTargetMachine.cpp.
      LLVMTargetMachine can intercept common passes and give precedence to command line overrides.
      Allows adding "internal" target configuration options without touching TargetOptions.
      Encapsulates the PassManager.
      Provides a good point to initialize all CodeGen passes so that Pass ID's can be used in APIs.
      Allows modifying the target configuration hooks without rebuilding the world.
      
      llvm-svn: 149672
      ccb67365
    • Andrew Trick's avatar
      whitespace · 808a7a6c
      Andrew Trick authored
      llvm-svn: 149671
      808a7a6c
    • Akira Hatanaka's avatar
      Add a new MachineJumpTableInfo entry type, EK_GPRel64BlockAddress, which is · f0b08445
      Akira Hatanaka authored
      needed to emit a 64-bit gp-relative relocation entry. Make changes necessary
      for emitting jump tables which have entries with directive .gpdword. This patch
      does not implement the parts needed for direct object emission or JIT.
      
      llvm-svn: 149668
      f0b08445
    • Jakob Stoklund Olesen's avatar
      Require non-NULL register masks. · 5e1ac45b
      Jakob Stoklund Olesen authored
      It doesn't seem worthwhile to give meaning to a NULL register mask
      pointer. It complicates all the code using register mask operands.
      
      llvm-svn: 149646
      5e1ac45b
  2. Feb 02, 2012
  3. Feb 01, 2012
    • Andrew Trick's avatar
      fix cmake · 3441597f
      Andrew Trick authored
      llvm-svn: 149553
      3441597f
    • Andrew Trick's avatar
      VLIW specific scheduler framework that utilizes deterministic finite automaton (DFA). · d06df96a
      Andrew Trick authored
      This new scheduler plugs into the existing selection DAG scheduling framework. It is a top-down critical path scheduler that tracks register pressure and uses a DFA for pipeline modeling.
      
      Patch by Sergei Larin!
      
      llvm-svn: 149547
      d06df96a
    • Stepan Dyatkovskiy's avatar
      SwitchInst refactoring. · 513aaa56
      Stepan Dyatkovskiy authored
      The purpose of refactoring is to hide operand roles from SwitchInst user (programmer). If you want to play with operands directly, probably you will need lower level methods than SwitchInst ones (TerminatorInst or may be User). After this patch we can reorganize SwitchInst operands and successors as we want.
      
      What was done:
      
      1. Changed semantics of index inside the getCaseValue method:
      getCaseValue(0) means "get first case", not a condition. Use getCondition() if you want to resolve the condition. I propose don't mix SwitchInst case indexing with low level indexing (TI successors indexing, User's operands indexing), since it may be dangerous.
      2. By the same reason findCaseValue(ConstantInt*) returns actual number of case value. 0 means first case, not default. If there is no case with given value, ErrorIndex will returned.
      3. Added getCaseSuccessor method. I propose to avoid usage of TerminatorInst::getSuccessor if you want to resolve case successor BB. Use getCaseSuccessor instead, since internal SwitchInst organization of operands/successors is hidden and may be changed in any moment.
      4. Added resolveSuccessorIndex and resolveCaseIndex. The main purpose of these methods is to see how case successors are really mapped in TerminatorInst.
      4.1 "resolveSuccessorIndex" was created if you need to level down from SwitchInst to TerminatorInst. It returns TerminatorInst's successor index for given case successor.
      4.2 "resolveCaseIndex" converts low level successors index to case index that curresponds to the given successor.
      
      Note: There are also related compatability fix patches for dragonegg, klee, llvm-gcc-4.0, llvm-gcc-4.2, safecode, clang.
      llvm-svn: 149481
      513aaa56
    • Argyrios Kyrtzidis's avatar
      Revert Chris' commits up to r149348 that started causing VMCoreTests unit test to fail. · 17c981a4
      Argyrios Kyrtzidis authored
      These are:
      
      r149348
      r149351
      r149352
      r149354
      r149356
      r149357
      r149361
      r149362
      r149364
      r149365
      
      llvm-svn: 149470
      17c981a4
  4. Jan 31, 2012
  5. Jan 30, 2012
  6. Jan 29, 2012
  7. Jan 28, 2012
  8. Jan 27, 2012
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