llvm-svn: 51630

is a memory location

llvm-svn: 51626

code generator would do something like this:

f64 = load f32 <anyext>, f32mem
v2f64 = insertelt undef, %0, 0
v2f64 = insertelt %1, 0.0, 1

into 

v2f64 = vzext_load f32mem

which on x86 is movsd, when you really wanted a cvtss2sd/movsd pair.

llvm-svn: 51624

llvm-svn: 51533

Eliminate x86.sse2.movs.d, x86.sse2.shuf.pd, x86.sse2.unpckh.pd, and x86.sse2.unpckl.pd intrinsics. These will be lowered into shuffles.

llvm-svn: 51531

llvm-svn: 51526

Remove x86.sse2.loadh.pd and x86.sse2.loadl.pd. These will be lowered into load and shuffle instructions.

llvm-svn: 51522

llvm-svn: 51501

llvm-svn: 51491

llvm-svn: 51490

load-folding table entries for PMULDQ and PMULLD.

llvm-svn: 51489

llvm-svn: 51487

instruction for doing this?

llvm-svn: 51473

Bug: rcpps can only folds a load if the address is 16-byte aligned. Fixed many 'ps' load folding patterns in X86InstrSSE.td which are missing the proper alignment checks.
Also fixed some 80 col. violations.

llvm-svn: 51462

g++.dg/abi/key2.C

llvm-svn: 51458

X86CodeEmitter should not set PIC style to None at initialization time. This will break codegen if relocation model is changed to PIC_ later.

llvm-svn: 51455

llvm-svn: 51435

llvm-svn: 51327

llvm-svn: 51291

$non_lazy_ptr's and $lazy_ptr's.

llvm-svn: 51277

llvm-svn: 51172

llvm-svn: 51165

Make use of vector load and store operations to implement memcpy, memmove, and memset. Currently only X86 target is taking advantage of these.

llvm-svn: 51140

are represented as "weak", but there are subtle differences
in some cases on Darwin, so we need both.  The intent
is that "common" will behave identically to "weak" unless
somebody changes their target to do something else.
No functional change as yet.

llvm-svn: 51118

llvm-svn: 51092

This eliminates the need for several awkward casts, including
the last dynamic_cast under lib/Target.

llvm-svn: 51091

llvm-svn: 51062

- Incorporate Chris' comment suggestion.

llvm-svn: 51061

llvm-svn: 51060

llvm-svn: 51057

- Correct a pasto.

llvm-svn: 51054

Instead of a vector load, shuffle and then extract an element. Load the element from address with an offset.
        pshufd $1, (%rdi), %xmm0
        movd %xmm0, %eax
=>
        movl 4(%rdi), %eax

llvm-svn: 51026

llvm-svn: 51020

llvm-svn: 51019

several things that were neither in an anonymous namespace nor static
but not intended to be global.

llvm-svn: 51017

Teach X86 a few more vsetcc patterns.  Custom lowering for unsupported ones is next.

llvm-svn: 51009

Xform bitconvert(build_pair(load a, load b)) to a single load if the load locations are at the right offset from each other.

llvm-svn: 51008

"is{Trivially,Really}ReMaterializable" methods.

llvm-svn: 51001

llvm-svn: 51000

encoding information.

llvm-svn: 50997