llvm-svn: 189656

llvm-svn: 189654

Teach X86 backend to create BMI2 BZHI instructions from (and X, (add (shl 1, Y), -1)). Fixes PR17038.

llvm-svn: 189653

Clean up some usage of Triple.  The base class has methods for determining if the target is iOS and Linux.

llvm-svn: 189604

llvm-svn: 189580

32-bit absolute addressing in instructions likei this:

	mov $_f, %rsi

which is not supported in 64-bit mode.

rdar://8827134

llvm-svn: 189543

llvm-svn: 189472

in use supports it.

llvm-svn: 189439

For now, (defined(X86_64_JIT) && defined(__CYGWIN__)) satisfies Cygwin64.

llvm-svn: 189437

In the LLVM side, x86_64-cygwin is almost as same as x86_64-mingw32.

llvm-svn: 189436

Summary: MASM let's you do stuff like 'MOV FS:20, EAX' and 'MOV EAX, FS:20'

Reviewers: craig.topper, rnk

Reviewed By: rnk

CC: llvm-commits

Differential Revision: http://llvm-reviews.chandlerc.com/D1470

llvm-svn: 189407

llvm-svn: 189349

llvm-svn: 189326

Revert "Fix the build broken by r189315." and "Move everything depending on Object/MachOFormat.h over to Support/MachO.h."

This reverts commits r189319 and r189315. r189315 broke some tests on what I
believe are big-endian platforms.

llvm-svn: 189321

llvm-svn: 189315

 VPSHUFD, VPERMILPS, VMOVDDUP, VMOVLHPS, VMOVHLPS, VSHUFPS, VALIGN
 single and double forms.

llvm-svn: 189215

Make sure x86 instructions using ssmem/sdmem operand types are only able to parse memory operands of the proper size in Intel syntax. Primarily affects some of sse cvt instructions.

llvm-svn: 189206

Remove some unnecessary PredicateMethod overrides. Add RenderMethod overrides to remove forwarding in the X86AsmParser code itself. No functional change.

llvm-svn: 189205

llvm-svn: 189204

First round of fixes for the x86 fixes for the x86 move accumulator from/to memory offset instructions.

-Assembly parser now properly check the size of the memory operation specified in intel syntax. So 'mov word ptr [5], al' is no longer accepted.
-x86-32 disassembly of these instructions no longer sign extends the 32-bit address immediate based on size.
-Intel syntax printing prints the ptr size and places brackets around the address immediate.

Known remaining issues with these instructions:
-Segment override prefix is not supported. PR16962 and PR16961.
-Immediate size should be changed by address size prefix.

llvm-svn: 189201

llvm-svn: 189189

Add hasSideEffects/mayLoad/mayStore flags to the X86 moffs8/moffs16/moffs32/moffs64 versions of move.

llvm-svn: 189182

llvm-svn: 189178

There is no advantage in being different and using the same names simplifies
clang a bit.

llvm-svn: 189141

llvm-svn: 189111

llvm-svn: 189005

llvm-svn: 188899

Synchronize VEX JIT encoding code with the MCJIT version. Fix a bug in the MCJIT code where CurOp was being incremented even if the operand it was pointing at wasn't used. Maybe only matters if there are any EVEX_K instructions that aren't VEX_4V.

llvm-svn: 188868

In LLVM FMA3 operands are dst, src1, src2, src3, however dst is not encoded as it is always src1. This was causing the encoding of the operands to be off by one.

Patch by Chris Bieneman.

llvm-svn: 188866

Rename mattr names for AVX-512 to from avx-512 -> avx512f, avx-512-pfi -> av512pf, avx-512-cdi -> avx512cd, avx-512-eri->avx512er. This matches better with official docs and what gcc patches appearto be using. I didn't touch the has* functions or the feature flag names to avoid change the td and lowering file while commits are still happening.

llvm-svn: 188859

I suppose all "lli -use-mcjit i686-*" should require GOT, (and to fail.)

llvm-svn: 188856

llvm-svn: 188786

llvm-svn: 188746

llvm-svn: 188745

Move AVX and non-AVX replication inside a couple multiclasses to avoid repeating each instruction for both individually.

llvm-svn: 188743

ADD, SUB, MUL integer and FP types. OR, AND, XOR.
Added embeded broadcast form for these instructions.

llvm-svn: 188673

llvm-svn: 188637

llvm-svn: 188629

llvm-svn: 188534

llvm-svn: 188469