- Incorporate Chris' comment suggestion.

llvm-svn: 51061

llvm-svn: 51060

working with struct field or array element values. Thanks Duncan!

llvm-svn: 51059

llvm-svn: 51057

llvm-svn: 51056

- Correct a pasto.

llvm-svn: 51054

llvm-svn: 51048

llvm-svn: 51035

A brief description about PIC16:
===============================
PIC16 is an 8-bit microcontroller with only one 8-bit register which is the 
accumulator. All arithmetic/load/store operations are 8-bit only.
The architecture has two address spaces: program and data. The program memory 
is divided into 2K pages and the data memory is divided into banks of 128 byte, with only 80 usable bytes, resulting in an non-contiguous data memory. 

It supports direct data memory access (by specifying the address as part of the instruction) and indirect data and program memory access (in an unorthodox fashion which utilize a 16 bit pointer register). 

Two classes of registers exist: (8-bit class which is only one
accumulator) (16-bit class, which contains one or more 16 bit
pointer(s))

llvm-svn: 51027

Instead of a vector load, shuffle and then extract an element. Load the element from address with an offset.
        pshufd $1, (%rdi), %xmm0
        movd %xmm0, %eax
=>
        movl 4(%rdi), %eax

llvm-svn: 51026

llvm-svn: 51025

llvm-svn: 51024

llvm-svn: 51023

address of the PassInfo directly instead of calling getPassInfo.
This eliminates a bunch of dynamic initializations of static data.

Also, fold RegisterPassBase into PassInfo, make a bunch of its
data members const, and rearrange some code to initialize data
members in constructors instead of using setter member functions.

llvm-svn: 51022

llvm-svn: 51021

llvm-svn: 51020

llvm-svn: 51019

several things that were neither in an anonymous namespace nor static
but not intended to be global.

llvm-svn: 51017

llvm-svn: 51013

llvm-svn: 51011

Teach X86 a few more vsetcc patterns.  Custom lowering for unsupported ones is next.

llvm-svn: 51009

Xform bitconvert(build_pair(load a, load b)) to a single load if the load locations are at the right offset from each other.

llvm-svn: 51008

llvm-svn: 51007

if those blocks consist entirely of common instructions;
merging will not add an extra branch in this case.

llvm-svn: 51006

changes that don't change functionality.

llvm-svn: 51004

"is{Trivially,Really}ReMaterializable" methods.

llvm-svn: 51001

llvm-svn: 51000

semantically identical, but little difference in
either results or execution speed; but it's much
easier to read, at least IMO.

llvm-svn: 50999

llvm-svn: 50998

encoding information.

llvm-svn: 50997

llvm-svn: 50996

llvm-svn: 50995

llvm-svn: 50994

llvm-svn: 50993

Hard code CmpInst back to i1 for now while I go track down what in the bitcode reader/writer is assuming i1
This was breaking a bunch of tests

llvm-svn: 50992

llvm-svn: 50991

llvm-svn: 50990

This is necessary to unbreak the build.

llvm-svn: 50988

possible for it to produce worse code than before.

The rest of this patch is code cleanup.

llvm-svn: 50987

llvm-svn: 50986