- Apr 22, 2012
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Bill Wendling authored
llvm-svn: 155307
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- Apr 21, 2012
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NAKAMURA Takumi authored
Thanks to Andy Gibbs, to report the issue. llvm-svn: 155287
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- Apr 20, 2012
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Craig Topper authored
Convert more uses of XXXRegisterClass to &XXXRegClass. No functional change since they are equivalent. llvm-svn: 155188
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- Apr 18, 2012
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Akira Hatanaka authored
llvm-svn: 155031
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Akira Hatanaka authored
llvm-svn: 155030
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- Apr 17, 2012
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Akira Hatanaka authored
llvm-svn: 154936
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Akira Hatanaka authored
Patch by Vladimir Medic. llvm-svn: 154935
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- Apr 16, 2012
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Akira Hatanaka authored
llvm-svn: 154838
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- Apr 12, 2012
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Akira Hatanaka authored
otherwise expand FNEG during legalization. llvm-svn: 154546
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Akira Hatanaka authored
Invalid operation is signaled if the operand of these instructions is NaN. llvm-svn: 154545
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Akira Hatanaka authored
- FCOPYSIGN nodes that have operands of different types were not handled. - Different code was generated depending on the endianness of the target. Additionally, code is added that emits INS and EXT instructions, if they are supported by target (they are R2 instructions). llvm-svn: 154540
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- Apr 05, 2012
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Akira Hatanaka authored
llvm-svn: 154062
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- Apr 04, 2012
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Owen Anderson authored
llvm-svn: 154054
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Akira Hatanaka authored
types for N32 ABI. Add new test case and update existing ones. llvm-svn: 154038
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Akira Hatanaka authored
types for N32 ABI. Test case will be updated after the patch that fixes TargetLowering::getPICJumpTableRelocBase is checked in. llvm-svn: 154036
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Akira Hatanaka authored
types for N32 ABI and update test case. llvm-svn: 154034
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Akira Hatanaka authored
types for N32 ABI and update test case. llvm-svn: 154031
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- Apr 03, 2012
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Akira Hatanaka authored
llvm-svn: 153926
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Akira Hatanaka authored
llvm-svn: 153925
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Akira Hatanaka authored
Patch by Vladimir Medic. llvm-svn: 153924
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- Apr 02, 2012
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Akira Hatanaka authored
This patch allows llvm to recognize that a 64 bit object file is being produced and that the subsequently generated ELF header has the correct information. The test case checks for both big and little endian flavors. Patch by Jack Carter. llvm-svn: 153889
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Benjamin Kramer authored
All implementations used the same code. llvm-svn: 153866
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Craig Topper authored
Remove getInstructionName from MCInstPrinter implementations in favor of using the instruction name table from MCInstrInfo. Reduces static data in the InstPrinter implementations. llvm-svn: 153863
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Craig Topper authored
Make MCInstrInfo available to the MCInstPrinter. This will be used to remove getInstructionName and the static data it contains since the same tables are already in MCInstrInfo. llvm-svn: 153860
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- Mar 31, 2012
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Akira Hatanaka authored
llvm-svn: 153795
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- Mar 29, 2012
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Akira Hatanaka authored
llvm-svn: 153671
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- Mar 28, 2012
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Akira Hatanaka authored
llvm-svn: 153557
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Akira Hatanaka authored
llvm-svn: 153554
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Akira Hatanaka authored
imposes a constraint that GOT16 referring to a local symbol or HI16 has to be followed immediately by a matching LO16 relocation. llvm-svn: 153553
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Akira Hatanaka authored
them as machine instructions. Directives ".set noat" and ".set at" are now emitted only at the beginning and end of a function except in the case where they are emitted to enclose .cpload with an immediate operand that doesn't fit in 16-bit field or unaligned load/stores. Also, make the following changes: - Remove function isUnalignedLoadStore and use a switch-case statement to determine whether an instruction is an unaligned load or store. - Define helper function CreateMCInst which generates an instance of an MCInst from an opcode and a list of operands. llvm-svn: 153552
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Akira Hatanaka authored
any side effects. llvm-svn: 153551
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- Mar 27, 2012
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Akira Hatanaka authored
llvm-svn: 153536
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Akira Hatanaka authored
If EmitNOAT is true, directives ".set noat" and ".set at" are emitted at the beginning and end of a function. llvm-svn: 153528
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Craig Topper authored
llvm-svn: 153502
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Akira Hatanaka authored
MachinePointerInfo when getStore is called to create a node that stores an argument passed in register to the stack. Without this change, the post RA scheduler will fail to discover the dependencies between the stores instructions and the instructions that load from a structure passed by value. The link to the related discussion is here: http://lists.cs.uiuc.edu/pipermail/llvmdev/2012-March/048055.html llvm-svn: 153499
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Akira Hatanaka authored
llvm-svn: 153498
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Akira Hatanaka authored
llvm-svn: 153497
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Akira Hatanaka authored
set it in MipsMCCodeEmitter::getMachineOpValue. Assert in getMachineOpValue if MachineOperand MO is of an unexpected type. llvm-svn: 153494
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Akira Hatanaka authored
offset applied to it. llvm-svn: 153493
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Akira Hatanaka authored
cleared. No functionality change. llvm-svn: 153491
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