definitions.

llvm-svn: 117114

llvm-svn: 117108

llvm-svn: 117099

llvm-svn: 117085

llvm-svn: 117080

llvm-svn: 117076

llvm-svn: 117072

llvm-svn: 117068

llvm-svn: 117060

half of the Q register), rather than with just regno.  This allows us to unify the encodings for
a lot of different NEON instrucitons that differ only in whether they have Q or D register operands.

llvm-svn: 117056

llvm-svn: 117055

the emitter to handle the addresses. Only simplify the offset if we need
to - also fix bug where in addrmode 5 we weren't dividing the offset by
4, which showed up due to not always lowering.

llvm-svn: 117051

llvm-svn: 117050

llvm-svn: 117047

llvm-svn: 117040

llvm-svn: 117039

in assigning it to a variable (gcc-4.6 warning).

llvm-svn: 117024

llvm-svn: 116992

llvm-svn: 116987

llvm-svn: 116983

llvm-svn: 116981

llvm-svn: 116977

extension register.

llvm-svn: 116970

registers.

llvm-svn: 116961

llvm-svn: 116955

#includes in the process.

llvm-svn: 116919

llvm-svn: 116915

llvm-svn: 116897

llvm-svn: 116886

llvm-svn: 116883

setup they require. Use this for ARM/Darwin to rematerialize the base
pointer from the frame pointer when required. rdar://8564268

llvm-svn: 116879

llvm-svn: 116863

integers by default, and remove the controlling flag, now
that LICM will hoist such vdup's.  8003375.

llvm-svn: 116852

erased the instruction during LICM so UpdateRegPressureAfter() should not
reference it afterwards.

llvm-svn: 116845

is", which breaks some nightly tests.

llvm-svn: 116816

  "long latency" enough to hoist even if it may increase spilling. Reloading
  a value from spill slot is often cheaper than performing an expensive
  computation in the loop. For X86, that means machine LICM will hoist
  SQRT, DIV, etc. ARM will be somewhat aggressive with VFP and NEON
  instructions.
- Enable register pressure aware machine LICM by default.

llvm-svn: 116781

llvm-svn: 116776

llvm-svn: 116768

llvm-svn: 116762

llvm-svn: 116750