Introduce DebugInfoProbe. This is used to monitor how llvm optimizer is treating debugging information. 
It generates output that lools like

8 times line number info lost by Scalar Replacement of Aggregates (SSAUp) 
1 times line number info lost by Simplify well-known library calls 
12 times variable info lost by Jump Threading

llvm-svn: 127381

llvm-svn: 127380

llvm-svn: 127376

Add test cases for Python SBThread.StepOut() API by stepping out of a malloc call where the call site is at function b().
Verifies that after the thread.StepOut(), we are at the correct line within function b.

llvm-svn: 127374

a...", it appears to cause us to reject various valid codes.

llvm-svn: 127373

llvm-svn: 127371

llvm-svn: 127370

llvm-svn: 127369

flexible.

If it returns a register class that's different from the input, then that's the
register class used for cross-register class copies.
If it returns a register class that's the same as the input, then no cross-
register class copies are needed (normal copies would do).
If it returns null, then it's not at all possible to copy registers of the
specified register class.

llvm-svn: 127368

list of protocols as well. // rdar://9078584

llvm-svn: 127367

llvm-svn: 127366

llvm-svn: 127365

llvm-svn: 127364

llvm-svn: 127363

llvm-svn: 127362

llvm-svn: 127360

llvm-svn: 127359

llvm-svn: 127358

llvm-svn: 127357

try to make o32 cc tests less specific to silence some buildbots. The test isn't enabled yet, this is will be done in a subsequent commit. Patch by Akira Hatanaka.

llvm-svn: 127356

to avoid a bogus warning. // rdar:// 9072298

llvm-svn: 127355

The insufficient encoding information of the combined instruction confuses the decoder wrt
UQADD16.  Add extra logic to recover from that.

Fixed an assert reported by Sean Callanan

llvm-svn: 127354

command line, they'll still be seen with -help-hidden.

llvm-svn: 127353

llvm-svn: 127352

The damage done by physreg coalescing only depends on the number of instructions
the extended physreg live range covers. This fixes PR9438.

The heuristic is still luck-based, and physreg coalescing really should be
disabled completely. We need a register allocator with better hinting support
before that is possible.

Convert a test to FileCheck and force spilling by inserting an extra call. The
previous spilling behavior was dependent on misguided physreg coalescing
decisions.

llvm-svn: 127351

The test is derived from an old miscompilation of
MultiSource/Benchmarks/VersaBench/8b10b which is run regularly, so we are not
losing coverage.

llvm-svn: 127350

llvm-svn: 127349

llvm-svn: 127348

This helps cases like 2008-07-19-movups-spills.ll, but doesn't have an obvious impact on benchmarks

llvm-svn: 127347

Add createELFObjectTargetWriter method to TargetAsmBackend, which enables construction of non-standard ELFObjectWriters that can be used in MCJIT.

llvm-svn: 127346

llvm-svn: 127345

llvm-svn: 127343

When ExactBECount is a constant, use it for MaxBECount.
When MaxBECount cannot be computed, replace it with ExactBECount.
Fixes PR9424.

llvm-svn: 127342

llvm-svn: 127341

llvm-svn: 127340

Introduce '-chain-include' option to specify headers that will be converted to chained PCHs in memory
without having to use multiple runs and intermediate files.

Intended for testing & debugging of chained PCH.

llvm-svn: 127339

llvm-svn: 127338

llvm-svn: 127336

llvm-svn: 127335

llvm-svn: 127334