- Jun 28, 2011
-
-
Nick Lewycky authored
llvm-svn: 133990
-
Rafael Espindola authored
llvm-svn: 133989
-
Andrew Trick authored
llvm-svn: 133988
-
Andrew Trick authored
evaluates all other IV exprs. llvm-svn: 133982
-
Chandler Carruth authored
llvm-svn: 133981
-
Chandler Carruth authored
opening single quote with no closing single quote, and with {} quotes "inside" of it. This broke some of our tools that scrape test cases. Also, while here, make the test actually assert what the comment says it asserts. This was essentially authored by Nick Lewycky, and merely typed in by myself. Let me know if this is still missing the mark, but the previous test only succeeded due to the improper quoting preventing *anything* from matching the grep -- it had a '4(%...)' sequence in the output! llvm-svn: 133980
-
Evan Cheng authored
llvm-svn: 133979
-
Jakob Stoklund Olesen authored
llvm-svn: 133978
-
Jim Grosbach authored
When the destination operand is the same as the first source register operand for arithmetic instructions, the destination operand may be omitted. For example, the following two instructions are equivalent: and r1, #ff and r1, r1, #ff rdar://9672867 llvm-svn: 133973
-
Evan Cheng authored
llvm-svn: 133967
-
Jim Grosbach authored
Correctly parse the forms of the Thumb mov-immediate instruction: 1. 8-bit immediate 0-255. 2. 12-bit shifted-immediate. The 16-bit immediate "movw" form is also legal with just a "mov" mnemonic, but is not yet supported. More parser logic necessary there due to fixups. llvm-svn: 133966
-
Evan Cheng authored
llvm-svn: 133964
-
Evan Cheng authored
llvm-svn: 133962
-
Andrew Trick authored
a bit more control over the order SCEVs are evaluated. llvm-svn: 133959
-
Chad Rosier authored
This was causing compile-time failures for some of the Objc and Obj-C++ benchmarks. The specific errors were of the form: "ld: duplicate symbol …" rdar://9660124 llvm-svn: 133955
-
Devang Patel authored
During bottom up fast-isel, instructions emitted to materalize registers are at top of basic block and do not have debug location. This may misguide debugger while entering the basic block and sometimes debugger provides semi useful view of current location to developer by picking up previous known location as current location. Assign a sensible location to the first instruction in a basic block, if it does not have one location derived from source file, so that debugger can provide meaningful user experience to developers in edge cases. llvm-svn: 133953
-
Eric Christopher authored
llvm-svn: 133952
-
- Jun 27, 2011
-
-
Jakub Staszak authored
llvm-svn: 133946
-
Jim Grosbach authored
Thumb2 MOV mnemonic can accept both cc_out and predication. We don't (yet) encode the instruction properly, but this gets the parsing part. llvm-svn: 133945
-
Evan Cheng authored
llvm-svn: 133944
-
Owen Anderson authored
Add support for alternative register names, useful for instructions whose operands are logically equivalent to existing registers, but happen to be printed specially. For example, an instruciton that prints d0[0] instead of s0. Patch by Jim Grosbach. llvm-svn: 133940
-
Jim Grosbach authored
llvm-svn: 133939
-
Jim Grosbach authored
llvm-svn: 133938
-
Jim Grosbach authored
llvm-svn: 133936
-
Eric Christopher authored
llvm-svn: 133935
-
Jim Grosbach authored
Add aliases for the vpush/vpop mnemonics to the VFP load/store multiple writeback instructions w/ SP as the base pointer. rdar://9683231 llvm-svn: 133932
-
Evan Cheng authored
llvm-svn: 133928
-
Evan Cheng authored
llvm-svn: 133927
-
Jim Grosbach authored
When the destination operand is the same as the first source register operand for arithmetic instructions, the destination operand may be omitted. For example, the following two instructions are equivalent: sub r2, r2, #6 sub r2, #6 rdar://9682597 llvm-svn: 133925
-
Owen Anderson authored
The index stored in the RegDefIter is one after the current index. When getting the index, decrement it so that it points to the current element. Fixes an off-by-one bug encountered when trying to make use of MVT::untyped. llvm-svn: 133923
-
Evan Cheng authored
into XXXGenRegisterInfo.inc. llvm-svn: 133922
-
Andrew Trick authored
Removed the check that peeks past EXTRA_SUBREG, which I don't think makes sense any more. Intead treat it as a normal register def. No significant affect on x86 or ARM benchmarks. llvm-svn: 133917
-
Jakob Stoklund Olesen authored
Also fix some of the tests that were actually testing wrong behavior - An input operand in {st} is only popped by the inline asm when {st} is also in the clobber list. The original bug reports all had ~{st} clobbers as they should. llvm-svn: 133916
-
Jakob Stoklund Olesen authored
Patch by Sanjoy Das! llvm-svn: 133910
-
Nick Lewycky authored
alloca that only holds a copy of a global and we're going to replace the users of the alloca with that global, just nuke the lifetime intrinsics. Part of PR10121. llvm-svn: 133905
-
Nick Lewycky authored
passes as well. llvm-svn: 133904
-
Jakob Stoklund Olesen authored
This allows for more live scratch registers which is needed to handle live ST registers before return and inline asm instructions. llvm-svn: 133903
-
Jakob Stoklund Olesen authored
Both become <earlyclobber> defs on the INLINEASM MachineInstr, but we now use two different asm operand kinds. The new Kind_Clobber is treated identically to the old Kind_RegDefEarlyClobber for now, but x87 floating point stack inline assembly does care about the difference. This will pop a register off the stack: asm("fstp %st" : : "t"(x) : "st"); While this will pop the input and push an output: asm("fst %st" : "=&t"(r) : "t"(x)); We need to know if ST0 was a clobber or an output operand, and we can't depend on <dead> flags for that. llvm-svn: 133902
-
Jakob Stoklund Olesen authored
The INLINEASM MachineInstrs have an immediate operand describing each original inline asm operand. Decode the bits in MachineInstr::print() so it is easier to read: INLINEASM <es:rorq $1,$0>, $0:[regdef], %vreg0<def>, %vreg1<def>, $1:[imm], 1, $2:[reguse] [tiedto:$0], %vreg2, %vreg3, $3:[regdef-ec], %EFLAGS<earlyclobber,imp-def> llvm-svn: 133901
-
Rafael Espindola authored
llvm-svn: 133900
-