llvm-svn: 69684

llvm-svn: 69680

Patch by Jay Foad!

llvm-svn: 69679

Patch by Jay Foad!

llvm-svn: 69678

non-zero exit status, so nm will already have printed some error
messages.'

Patch by Jay Foad!

llvm-svn: 69677

Spotted by gcc-4.5.

llvm-svn: 69673

This fixes PR4002.

llvm-svn: 69672

llvm-svn: 69665

as they appear in LLVM IR. This isn't particularly interesting
on its own; this is just setting up some infrastructure.

llvm-svn: 69655

llvm-svn: 69651

and SCEVSignExtendExpr.

llvm-svn: 69649

llvm-svn: 69645

the code to minimize dependencies on TargetData.

llvm-svn: 69644

llvm-svn: 69643

llvm-svn: 69640

Patch by Marius Wachtler

llvm-svn: 69637

This makes the extra copyRegToReg calls in ScheduleDAGSDNodesEmit.cpp
unnecessary. Derived from a patch by Jakob Stoklund Olesen.

llvm-svn: 69635

broadcasted vector constants.

llvm-svn: 69634

llvm-svn: 69633

GEP's don't usually become instructions.

llvm-svn: 69631

llvm-svn: 69630

  clang: error: unable to make temporary file: /etc/cc: can't make
  unique filename: Permission denied

instead of 

  clang: error: unable to make temporary file: /etc/cc: can't make
  unique filenamePermission denied

for example.

Also, audited the uses of MakeErrMsg to make the prefix strings
consistent (not end with newline/punctuation/space/": ").

llvm-svn: 69626

llvm-svn: 69624

in the MachineFunction class, renaming it to addLiveIn for consistency with
the same method in MachineBasicBlock.  Thanks for Anton for suggesting this.

llvm-svn: 69615

llvm-svn: 69613

llvm-svn: 69610

llvm-svn: 69607

- Find more reloads from SS.

llvm-svn: 69606

llvm-svn: 69605

now that errs() is properly non-buffered.

llvm-svn: 69602

llvm-svn: 69599

which include Functions, where it can be quite useful to use an
AssemblyAnnotationWriter.

llvm-svn: 69598

64 bit platforms when building with optimization.
So replace them by a hand-coded implementation.
This fixes PR3822.

llvm-svn: 69597

llvm-svn: 69596

Added a linearscan register allocation optimization. When the register allocator spill an interval with multiple uses in the same basic block, it creates a different virtual register for each of the reloads. e.g.

	%reg1498<def> = MOV32rm %reg1024, 1, %reg0, 12, %reg0, Mem:LD(4,4) [sunkaddr39 + 0]
        %reg1506<def> = MOV32rm %reg1024, 1, %reg0, 8, %reg0, Mem:LD(4,4) [sunkaddr42 + 0]
        %reg1486<def> = MOV32rr %reg1506
        %reg1486<def> = XOR32rr %reg1486, %reg1498, %EFLAGS<imp-def,dead>
        %reg1510<def> = MOV32rm %reg1024, 1, %reg0, 4, %reg0, Mem:LD(4,4) [sunkaddr45 + 0]

=>

        %reg1498<def> = MOV32rm %reg2036, 1, %reg0, 12, %reg0, Mem:LD(4,4) [sunkaddr39 + 0]
        %reg1506<def> = MOV32rm %reg2037, 1, %reg0, 8, %reg0, Mem:LD(4,4) [sunkaddr42 + 0]
        %reg1486<def> = MOV32rr %reg1506
        %reg1486<def> = XOR32rr %reg1486, %reg1498, %EFLAGS<imp-def,dead>
        %reg1510<def> = MOV32rm %reg2038, 1, %reg0, 4, %reg0, Mem:LD(4,4) [sunkaddr45 + 0]

From linearscan's point of view, each of reg2036, 2037, and 2038 are separate registers, each is "killed" after a single use. The reloaded register is available and it's often clobbered right away. e.g. In thise case reg1498 is allocated EAX while reg2036 is allocated RAX. This means we end up with multiple reloads from the same stack slot in the same basic block.

Now linearscan recognize there are other reloads from same SS in the same BB. So it'll "downgrade" RAX (and its aliases) after reg2036 is allocated until the next reload (reg2037) is done. This greatly increase the likihood reloads from SS are reused.

This speeds up sha1 from OpenSSL by 5.8%. It is also an across the board win for SPEC2000 and 2006.

llvm-svn: 69585

llvm-svn: 69583

pointer type, make sure that the pointer size is a valid sequential index type.

llvm-svn: 69574

freeMachineCodeForFunction was never called.

llvm-svn: 69531

llvm-svn: 69529

bigger than the vector element type, turn checking
of the operand type back on again, appropriately
adjusted.

llvm-svn: 69516