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  1. Jul 09, 2004
    • Misha Brukman's avatar
      * Doxygenify comments · b47ab7ae
      Misha Brukman authored
      * Fix spacing, grammar in comment
      * Make code layout consistent
      * Wrap code at 80 cols
      * Delete spurious blank lines
      
      No functional changes.
      
      llvm-svn: 14721
      b47ab7ae
  2. Jul 04, 2004
  3. Jun 25, 2004
  4. Jun 18, 2004
  5. Jun 02, 2004
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  10. Feb 27, 2004
  11. Feb 23, 2004
  12. Feb 19, 2004
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  14. Feb 13, 2004
  15. Feb 12, 2004
  16. Feb 04, 2004
  17. Feb 03, 2004
  18. Dec 14, 2003
    • Alkis Evlogimenos's avatar
      Change interface of MachineOperand as follows: · aaba4639
      Alkis Evlogimenos authored
          a) remove opIsUse(), opIsDefOnly(), opIsDefAndUse()
          b) add isUse(), isDef()
          c) rename opHiBits32() to isHiBits32(),
                    opLoBits32() to isLoBits32(),
                    opHiBits64() to isHiBits64(),
                    opLoBits64() to isLoBits64().
      
      This results to much more readable code, for example compare
      "op.opIsDef() || op.opIsDefAndUse()" to "op.isDef()" a pattern used
      very often in the code.
      
      llvm-svn: 10461
      aaba4639
  19. Nov 11, 2003
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  25. Jul 10, 2003
  26. May 31, 2003
  27. May 27, 2003
    • Vikram S. Adve's avatar
      (1) Added special register class containing (for now) %fsr. · 7366fa1a
      Vikram S. Adve authored
          Fixed spilling of %fcc[0-3] which are part of %fsr.
      
      (2) Moved some machine-independent reg-class code to class TargetRegInfo
          from SparcReg{Class,}Info.
      
      (3) Renamed MachienOperand::opIsDef to MachineOperand::opIsDefOnly()
          and related functions and flags.  Fixed several bugs where only
          "isDef" was being checked, not "isDefAndUse".
      
      llvm-svn: 6341
      7366fa1a
  28. Jan 15, 2003
  29. Jan 14, 2003
  30. Jan 13, 2003
  31. Dec 28, 2002
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  33. Nov 18, 2002
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