llvm-svn: 6765

so that we can easily change its use to be conditional on the result of
an autoconf test later.

llvm-svn: 6723

llvm-svn: 6712

llvm-svn: 6711

llvm-svn: 6692

llvm-svn: 6678

llvm-svn: 6658

llvm-svn: 6657

llvm-svn: 6656

* BPA and BPN do not take a %cc register as a parameter
* SLL/SRL/SRA{r,i}5 are there for a reason - they are ONLY 32-bit instructions
* Likewise, SLL/SRL/SRAX{r,i}6 are only 64-bit
* Added WRCCR{r,i} opcodes

llvm-svn: 6655

* Removed instruction scheduling as it is too slow to run in a JIT environment
* Removed other passes because they aren't necessary and can slow JIT down

llvm-svn: 6652

address of a floating-point (allocated via ConstantPool) correctly.

llvm-svn: 6647

Add GROSS HACK to get CompilationCallback to work when compiled in release mode

llvm-svn: 6646

* Do not block a print statement with a DEBUG() guard if we're going to abort()

llvm-svn: 6645

llvm-svn: 6644

that tests can automatically diff the output.

llvm-svn: 6642

Now %fcc registers are recognized correctly.

llvm-svn: 6640

llvm-svn: 6639

class, because they are currently unused.

llvm-svn: 6638

llvm-svn: 6637

Also, reorder a couple of functions for inlining.

llvm-svn: 6635

llvm-svn: 6633

* Stop mapping FBcc instructions to deprecated opcodes, map to FBPcc instead.
* Fixed opf in FCMPxy instructions.

llvm-svn: 6632

llvm-svn: 6627

  This avoid generating a register to hold C, which in turn speeds up the
  register allocator by a lot: ~9% on 164.gzip and ~17% on 256.bzip2.  This
  also speeds up other passes.  This also speeds up execution of the program
  marginally, and makes the asm much easier to read. :)

llvm-svn: 6626

llvm-svn: 6625

Special cases: STFSRx and STXFSRx - they operate on predefined rd=0 or rd=1, and
expect %fsr as the parameter in assembly. They are disabled (since not used)
until an encoding, both for code generation and output, is chosen.

llvm-svn: 6619

llvm-svn: 6618

 Update file comment to contain a bunch of the overview mapping-info
  documentation previously buried within the file.
 Remove some unnecessary include/using stmts.
 Rename pass to MappingInfoCollector.
 Rewrite a lot of it so it doesn't use global instance variables and so
  it outputs into MappingInfo objects and then dumps those out, instead of going
  straight to an assembly file.
 Change name of factory to getMappingInfoCollector.
 Fold prologue & epilogue writers into MappingInfo methods.

lib/Target/Sparc/FInfo.cpp:
 Correct file comment to reflect above change

lib/Target/Sparc/Sparc.cpp:
 Change name of factory to getMappingInfoCollector.

llvm-svn: 6617

to reflect file's current location.  Add definition of class
MappingInfo.

llvm-svn: 6616

sorry dude

llvm-svn: 6615

undeclared. I was not sure what Brian wanted, so I will let him fix this. But now it compiles.

llvm-svn: 6614

  in Emitter.cpp, just convert the Sparc version of the constant pool into
  what's already supported and inter-operate.
* Implemented a first pass at lazy function resolution in the JITResolver. That
  required adding a SparcV9CodeEmitter pointer to simplify generating
  bit-patterns of the instructions.
* SparcV9CodeEmitter now creates and destroys static TheJITResolver, which makes
  sense because the SparcV9CodeEmitter is the only user of TheJITResolver, and
  lives for the entire duration of the JIT (via PassManager which lives in VM).
* Changed all return values in the JITResolver to uint64_t because of the 64-bit
  Sparc architecture.
* Added a new version of getting the value of a GlobalValue in the
  SparcV9CodeEmitter, which now works for already-generated functions (JITted or
  library functions).
* Removed little-used and unused functions, cleaning up the internal view of the
  SparcV9CodeEmitter.

llvm-svn: 6612

llvm-svn: 6609

llvm-svn: 6601

llvm-svn: 6597

no sense.

llvm-svn: 6595

llvm-svn: 6594

llvm-svn: 6593

llvm-svn: 6591