llvm-svn: 72729

llvm-svn: 72728

Also, committing an #if 0'ed __builtin_setjmp and __builtin_longjmp 
implementation I've had sitting in my tree for a while.  I haven't 
enabled it because the LLVM backend support isn't complete yet.

llvm-svn: 72727

llvm-svn: 72726

section of the users manual.

llvm-svn: 72725

# line directives.

llvm-svn: 72724

llvm-svn: 72723

alloca without declaring it.

llvm-svn: 72719

llvm-svn: 72718

llvm-svn: 72717

llvm-svn: 72716

very much, but I have a feeling we're never going to have an 
implementation that makes sense because of compatibility issues.

llvm-svn: 72715

llvm-svn: 72714

llvm-svn: 72713

llvm-svn: 72712

in merge_types. It is incomplete. We probably want to issue 
a warning if user attempts to change the attribute from __weak to
__strong or vice-vera. It also assumes that a __weak/__strong
attribute can not be specified with other (currently one) type
attriute. 

llvm-svn: 72711

Avoid infinite looping in AllGlobalLoadUsesSimpleEnoughForHeapSRA(). This can happen when PHI uses are recursively dependent on each other.

llvm-svn: 72710

llvm-svn: 72709

llvm-svn: 72708

ADDC/ADDE use MVT::i1 (later, whatever it gets legalized to)
instead of MVT::Flag.  Remove CARRY_FALSE in favor of 0; adjust
all target-independent code to use this format.

Most targets will still produce a Flag-setting target-dependent
version when selection is done.  X86 is converted to use i32
instead, which means TableGen needs to produce different code
in xxxGenDAGISel.inc.  This keys off the new supportsHasI1 bit
in xxxInstrInfo, currently set only for X86; in principle this
is temporary and should go away when all other targets have
been converted.  All relevant X86 instruction patterns are
modified to represent setting and using EFLAGS explicitly.  The
same can be done on other targets.

The immediate behavior change is that an ADC/ADD pair are no
longer tightly coupled in the X86 scheduler; they can be
separated by instructions that don't clobber the flags (MOV).
I will soon add some peephole optimizations based on using
other instructions that set the flags to feed into ADC.

llvm-svn: 72707

llvm-svn: 72706

llvm-svn: 72705

directory exist.

llvm-svn: 72704

for the Next runtime.

llvm-svn: 72703

as necessary.

llvm-svn: 72702

Parse __OBJC data structures and synthesize magic .objc_ symbols.
Also, alter mangler so that objc method names are readable.

llvm-svn: 72700

llvm-svn: 72699

llvm-svn: 72698

llvm-svn: 72697

llvm-svn: 72696

not runaable.

llvm-svn: 72695

llvm-svn: 72694

llvm-svn: 72691

K&R-style definition.

llvm-svn: 72690

definition variadic.  I'm not completely sure it's legal, but the 
standard can be interpreted as making it legal, and gcc seems to think 
it's legal, so I didn't add an extension warning.

llvm-svn: 72689

RewriteStoreUserOfWholeAlloca deal with tail padding because 
isSafeUseOfBitCastedAllocation expects them to.  Otherwise, we crash 
trying to erase the bitcast.

llvm-svn: 72688

llvm-svn: 72687

preprocessor.

llvm-svn: 72686

metadata references non-Constant values such as instructions.

llvm-svn: 72685

llvm-svn: 72684