This lets several failing tests get farther along, but doesn't completely fix any of them.

llvm-svn: 59086

llvm-svn: 59084

before creating the SUnit for the operation that it was unfolded from. This
allows each SUnit to have all of its predecessor SUnits available at the time
it is created. I don't know yet if this will be absolutely required, but it
is a little tidier to do it this way.

llvm-svn: 59083

TargetLoweringInfo variables for the scheduler.

llvm-svn: 59082

llvm-svn: 59077

llvm-svn: 59074

llvm-svn: 59068

llvm-svn: 59064

llvm-svn: 59063

argument instead of taking the SelectionDAG's TargetMachine. This is
needed for some upcoming scheduler changes.

llvm-svn: 59055

llvm-svn: 59052

llvm-svn: 59050

llvm-svn: 59047

llvm-svn: 59046

to be sign-extended when it is promoted to 64 bits for intermediate
offset calculations. The offset calculations are done as uint64_t so that
overflow conditions are well defined.

This fixes a problem which is currently hidden by the x86 AsmPrinter but
which was exposed by r58917 (which is temporarily reverted).  See PR3027
for details.

llvm-svn: 59044

llvm-svn: 59039

The CC was changed, but wasn't checked to see if it was legal if the DAG
combiner was being run after legalization. Threw in a couple of checks just to
make sure that it's okay. As far as the PR is concerned, no back-end target
actually exhibited this problem, so there isn't an associated testcase.

llvm-svn: 59035

llvm-svn: 59026

llvm-svn: 59025

backend.

llvm-svn: 59018

llvm-svn: 59016

llvm-svn: 59012

llvm-svn: 59011

llvm-svn: 59009

llvm-svn: 59008

llvm-svn: 59007

llvm-svn: 59006

llvm-svn: 59004

Comparing stages 2 and 3
warning: ./cc1-checksum.o differs
warning: ./cc1obj-checksum.o differs
warning: ./cc1objplus-checksum.o differs
warning: ./cc1plus-checksum.o differs
Bootstrap comparison failure!
./alias.o differs
./alloc-pool.o differs
./attribs.o differs
./bb-reorder.o differs
./bitmap.o differs
./build/errors.o differs
./build/genattrtab.o differs
./build/genautomata.o differs
./build/genemit.o differs
./build/genextract.o differs
...

-bw

llvm-svn: 59003

  basic blocks.
- Minor code clean-up.

llvm-svn: 59002

support targets that support these conversions. Users should avoid using
this node as the current targets don't generating code for it.

llvm-svn: 59001

then do not split loop index.

llvm-svn: 58995

where the argument is an apint, or smaller than the minimum
size for which there is a libcall (i32). 

llvm-svn: 58994

llvm-svn: 58993

llvm-svn: 58992

inform the optimizers that the result must be zero/
sign extended from the smaller type.  For example,
if a fp to unsigned i16 is promoted to fp to i32,
then we are allowed to assume that the extra 16 bits
are zero (because the result of fp to i16 is undefined
if the result does not fit in an i16).  This is
quite aggressive, but should help the optimizers
produce better code.  This requires correcting a
test which thought that fp_to_uint is some kind
of truncation, which it is not: in the testcase
(which does fp to i1), either the fp value converts
to 0 or 1 or the result is undefined, which is
quite different to truncation.

llvm-svn: 58991

Fixes ppc32 bootstrap.

llvm-svn: 58979

The previous patches didn't match correctly. Also, we need to make sure that
the conditional is the same before doing the transformation.

llvm-svn: 58978

<result> = shufflevector <n x <ty>> <v1>, <n x <ty>> <v2>, <m x i32> <mask> 

llvm-svn: 58964

llvm-svn: 58963