on CodeGen/X86/2007-05-07-InvokeSRet.ll. There is probably a bug here that was
fixed by r128961, but since there is no test or reference to a source file I have
to revert it.

llvm-svn: 131618

Original log entry:
Refactor getActionType and getTypeToTransformTo ; place all of the 'decision'
code in one place.

llvm-svn: 131536

code in one place.

llvm-svn: 131534

llvm-svn: 131524

The 'last use' may not be in the same basic block, and we still want a correct
live range.

llvm-svn: 131523

LiveInterval::shrinkToUses recomputes the live range from scratch instead of
removing snippets. This should avoid the problem with dangling live ranges.

Leave physreg identity copies alone. They can be created when joining a virtreg
with a physreg. They don't affect register allocation, and they will be removed
by the rewriter.

llvm-svn: 131521

Make fast-isel miss counting in -stats and -fast-isel-verbose take terminators into account; since there are many fewer isel misses with recent changes, misses caused by terminators are more significant.

llvm-svn: 131502

llvm-svn: 131497

llvm-svn: 131495

llvm-svn: 131469

passed as the fifth parameter, insure it's passed correctly (in R9).
rdar://problem/6920088

llvm-svn: 131467

The greedy register allocator has live range splitting and register class
inflation, so it can actually fully undo this join, including restoring the
original register classes.

We still don't want to do this for long live ranges, mostly because of the high
register pressure of there are many constrained live ranges overlapping.

llvm-svn: 131466

When instructions are deleted, they leave tombstone SlotIndex entries.
The isZeroLength method should ignore these null indexes.

This causes RABasic to sometimes spill a callee-saved register in the
abi-isel.ll test, so don't run that test with -regalloc=basic.  Prioritizing
register allocation according to spill weight can cause more registers to be
used.

llvm-svn: 131436

llvm-svn: 131430

llvm-svn: 131429

llvm-svn: 131428

misses.

llvm-svn: 131426

Radar 9422775.

llvm-svn: 131422

llvm-svn: 131420

llvm-svn: 131419

Basic fast-isel of extractvalue.  Not too helpful on its own, given the IR clang generates for cases like this, but it should become more useful soon.

llvm-svn: 131417

corrupted when setjmp returns again.

llvm-svn: 131399

Fix a FIXME by moving the fast-isel implementation of the objectsize intrinsic from the x86 code to the generic code.

llvm-svn: 131332

to fix PR9900. I will keep it open until sable is able to comment on it.

llvm-svn: 131294

simplified version.  <rdar://problem/9298790>

llvm-svn: 131274

rdar://problem/9298790

llvm-svn: 131269

by non-CMP expressions.  The executable test case (129821) would test
this as well, if we had an "-O0 -disable-arm-fast-isel" LLVM-GCC
tester.  Alas, the ARM assembly would be very difficult to check with
FileCheck.

The thumb2-cbnz.ll test is affected; it generates larger code (tst.w
vs. cmp #0), but I believe the new version is correct.
rdar://problem/9298790

llvm-svn: 131261

llvm-svn: 131258

s/DW_AT_APPLE_objc_class_extension/DW_AT_APPLE_objc_complete_type/g

llvm-svn: 131244

Re-enable branchfolding common code hoisting optimization. Fixed a liveness test bug and also taught it to update liveins.

llvm-svn: 131241

Let Objective-C front-end identify class extension, in dwarf output, using an attribute DW_AT_APPLE_objc_class_extension.

llvm-svn: 131238

llvm-svn: 131235

markers. In some cases a register def is dead on one path, but not on
another.

This is passing Clang self-hosting.

llvm-svn: 131214

Identify end of prologue (and beginning of function body) using DW_LNS_set_prologue_end line table opcode.

llvm-svn: 131194

about to be spilled.

This can only happen when two extra snippet registers are included in the spill,
and there is a copy between them. Hoisting the spill creates problems because
the hoist will mark the copy for later dead code elimination, and spilling the
second register will turn the copy into a spill.

<rdar://problem/9420853>

llvm-svn: 131192

Fixes a bug in the DAGCombiner.  LoadSDNodes have two values (data, chain).
If there is a store after the load node, then there is a chain, which means
that there is another user. Thus, asking hasOneUser would fail. Instead we
ask hasNUsesOfValue on the 'data' value.

llvm-svn: 131183

to provide a reduced testcase.

llvm-svn: 131176

intrinsic call. This prevents it from being reordered so that it appears
*before* the setjmp intrinsic (thus making it completely useless).
<rdar://problem/9409683>

llvm-svn: 131174

at the start of basic blocks to their common predecessor. It's actually quite
common (e.g. about 50 times in JM/lencod) and has shown to be a nice code size
benefit. e.g.

        pushq   %rax
        testl   %edi, %edi
        jne     LBB0_2
## BB#1:
        xorb    %al, %al
        popq    %rdx
        ret
LBB0_2:
        xorb    %al, %al
        callq   _foo
        popq    %rdx
        ret

=>

        pushq   %rax
        xorb    %al, %al
        testl   %edi, %edi
        je      LBB0_2
## BB#1:
        callq   _foo
LBB0_2:
        popq    %rdx
        ret

rdar://9145558

llvm-svn: 131172

llvm-svn: 131157