it's late, and I don't have any better ideas at the moment.  Fixes PR4257.

llvm-svn: 72363

can crash during instruction simplification (for example if it creates a
broken module).

llvm-svn: 72362

Sometimes when bugpointing a crash the bugpoint-reduced-simplified.bc reproduces
a totally different bug than the original one ("GV doesn't have initializer").
Although its useful to report that bug too, I need a way to reduce the original
bug, hence I introduced -disable-global-remove.

llvm-svn: 72361

llvm-svn: 72360

all results and all operands are legal, so this change shouldn't affect 
behavior at all.

llvm-svn: 72359

This leaves around 4000 lines of dead code; I'll clean that up 
in subsequent commits.

llvm-svn: 72358

llvm-svn: 72357

nodes it generates.

llvm-svn: 72356

llvm-svn: 72355

llvm-svn: 72354

llvm-svn: 72353

llvm-svn: 72352

ExpandExtractFromVectorThroughStack.

llvm-svn: 72351

moment.

llvm-svn: 72350

doesn't split legal vector operands.  This is necessary because the 
type legalization (and therefore, vector splitting) code will be going 
away soon.

llvm-svn: 72349

how to get the backend to know that the operation is volatile.

llvm-svn: 72348

llvm-svn: 72347

is still ignored.

llvm-svn: 72344

llvm-svn: 72343

llvm-svn: 72342

llvm-svn: 72341

llvm-svn: 72340

llvm-svn: 72339

llvm-svn: 72337

llvm-svn: 72336

llvm-svn: 72335

llvm-svn: 72333

llvm-svn: 72332

The DAGCombiner created a negative shiftamount, stored in an
unsigned variable. Later the optimizer eliminated the shift entirely as being
undefined.
Example: (srl (shl X, 56) 48). ShiftAmt is 4294967288.
Fix it by checking that the shiftamount is positive, and storing in a signed
variable.

llvm-svn: 72331

llvm-svn: 72330

llvm-svn: 72329

and it wasn't generating calls through @PLT for these functions.
hasLocalLinkage() is now false for available_externally,
I attempted to fix the inliner and dce to handle available_externally properly.
It passed make check.

llvm-svn: 72328

running an extra DAGCombine pass which improves the code a bit.

llvm-svn: 72326

will allow simplifying LegalizeDAG to eliminate type legalization.  (I 
have a patch to do that, but it's not quite finished; I'll commit it 
once it's finished and I've fixed any review comments for this patch.)  
See the comment at the beginning of 
lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp for more details on the
motivation for this patch.

llvm-svn: 72325

systems instead of attempting to promote them to a 64-bit SINT_TO_FP or 
FP_TO_SINT.  This is in preparation for removing the type legalization 
code from LegalizeDAG: once type legalization is gone from LegalizeDAG, 
it won't be able to handle the i64 operand/result correctly.

This isn't quite ideal, but I don't think any other operation for any 
target ends up in this situation, so treating this case specially seems 
reasonable.

llvm-svn: 72324

llvm-svn: 72315

llvm-svn: 72314

 - Otherwise we may incorrectly miss generation of some write barriers.

llvm-svn: 72313

llvm-svn: 72311

PPC double double.

(No testcase because no normal target uses the format at the moment.)

llvm-svn: 72310