llvm-svn: 141505

A GR8_NOREX virtual register is created when extrating a sub_8bit_hi
sub-register:

  %vreg2<def> = COPY %vreg1:sub_8bit_hi; GR8_NOREX:%vreg2 %GR64_ABCD:%vreg1
  TEST8ri_NOREX %vreg2, 1, %EFLAGS<imp-def>; GR8_NOREX:%vreg2

If such a live range is ever split, its register class must not be
inflated to GR8.  The sub-register copy can only target GR8_NOREX.

I dont have a test case for this theoretical bug.

llvm-svn: 141500

In 64-bit mode, sub_8bit_hi sub-registers can only be used by NOREX
instructions. The COPY created from the EXTRACT_SUBREG DAG node cannot
target all GR8 registers, only those in GR8_NOREX.

TO enforce this, we ensure that all instructions using the
EXTRACT_SUBREG are GR8_NOREX constrained.

This fixes PR11088.

llvm-svn: 141499

llvm-svn: 141492

llvm-svn: 141490

llvm-svn: 141485

llvm-svn: 141484

llvm-svn: 141483

llvm-svn: 141481

llvm-svn: 141476

llvm-svn: 141475

llvm-svn: 141474

conversion instructions. 

llvm-svn: 141473

instruction selector to generate them.

llvm-svn: 141471

llvm-svn: 141470

across unwind edges. This is for the back-end which expects such things.

The code is from the original SjLj EH pass.

llvm-svn: 141463

llvm-svn: 141449

llvm-svn: 141448

llvm-svn: 141446

Fixes rdar://problem/5064068

llvm-svn: 141442

Fix APInt::operator*= so that it computes the correct result for large integers where there is unsigned overflow.  Fix APFloat::toString so that it doesn't depend on the incorrect behavior in common cases (and computes the correct result in some rare cases).  Fixes PR11086.

llvm-svn: 141441

llvm-svn: 141440

llvm-svn: 141439

llvm-svn: 141438

successor. Remove the old landing pad from their successor list, because it's
now the successor of the dispatch block. Now that the landing pad blocks are no
longer the destination of invokes, we can mark them as normal basic blocks
instead of landing pads.

This more closely resembles what the CFG is actually doing.

llvm-svn: 141436

it with the new SjLj emitter stuff. This way there's no need to emit that
kind-of-hacky intrinsic.

llvm-svn: 141419

do. This will be useful later on with the new SJLJ stuff.

llvm-svn: 141416

patch by Cary Coutant!

llvm-svn: 141413

llvm-svn: 141412

This instruction is explicitly encoded without an REX prefix, so both
operands but be *_NOREX.

Also add an assertion to copyPhysReg() that fires when the MOV8rr_NOREX
constraints are not satisfied.

This fixes a miscompilation in 20040709-2 in the gcc test suite.

llvm-svn: 141410

llvm-svn: 141389

llvm-svn: 141385

Consider:
  mov r8, r11 fred

Previously, we issued the not very informative:
x.s:6:1: error: unexpected token in argument list

^

Now we generate:
x.s:5:14: error: unexpected token in argument list
  mov r8, r11 fred
              ^

llvm-svn: 141380

--- Reverse-merging r141377 into '.':
U    tools/llvm-objdump/MachODump.cpp
--- Reverse-merging r141376 into '.':
U    include/llvm/Object/COFF.h
U    include/llvm/Object/ObjectFile.h
U    include/llvm-c/Object.h
U    tools/llvm-objdump/llvm-objdump.cpp
U    lib/Object/MachOObjectFile.cpp
U    lib/Object/COFFObjectFile.cpp
U    lib/Object/Object.cpp
U    lib/Object/ELFObjectFile.cpp

llvm-svn: 141379

Multidefs are a bit unwieldy and incomplete.  Remove them in favor of
another mechanism, probably for loops.

Revert "Make Test More Thorough"
Revert "Fix a typo."
Revert "Vim Support for Multidefs"
Revert "Emacs Support for Multidefs"
Revert "Document Multidefs"
Revert "Add a Multidef Test"
Revert "Update Test for Multidefs"
Revert "Process Multidefs"
Revert "Parser Multidef Support"
Revert "Lexer Support for Multidefs"
Revert "Add Multidef Data Structures"

llvm-svn: 141378

llvm-svn: 141376

llvm-svn: 141371

llvm-svn: 141370

llvm-svn: 141368

llvm-svn: 141366