- Dec 09, 2011
-
-
Evan Cheng authored
Move isUnpredicatedTerminator() default implementation to TargetInstrInfoImpl to break Target's dependency on CodeGen. llvm-svn: 146247
-
Evan Cheng authored
llvm-svn: 146246
-
Andrew Trick authored
Patch by Brendon Cahoon! This extends the existing LoopUnroll and LoopUnrollPass. Brendon measured no regressions in the llvm test suite with -unroll-runtime enabled. This implementation works by using the existing loop unrolling code to unroll the loop by a power-of-two (default 8). It generates an if-then-else sequence of code prior to the loop to execute the extra iterations before entering the unrolled loop. llvm-svn: 146245
-
Rafael Espindola authored
symbol difference. This matches gas behavior and fixes PR11513. We still don't handle _GLOBAL_OFFSET_TABLE_ in data sections. llvm-svn: 146238
-
Akira Hatanaka authored
llvm-svn: 146232
-
Akira Hatanaka authored
specified. llvm-svn: 146229
-
Devang Patel authored
llvm-svn: 146226
-
Devang Patel authored
llvm-svn: 146220
-
Eli Friedman authored
llvm-svn: 146219
-
Devang Patel authored
llvm-svn: 146205
-
- Dec 08, 2011
-
-
Jim Grosbach authored
llvm-svn: 146201
-
Michael J. Spencer authored
directory_iterator preserve InputIterator semantics on copy. llvm-svn: 146200
-
Nick Lewycky authored
trivially infinite. llvm-svn: 146197
-
-
Jim Grosbach authored
llvm-svn: 146194
-
Owen Anderson authored
Enhance both TargetLibraryInfo and SelectionDAGBuilder so that the latter can use the former to prevent the formation of libm SDNode's when -fno-builtin is passed. llvm-svn: 146193
-
Jim Grosbach authored
llvm-svn: 146192
-
Evan Cheng authored
code looks pretty bad compared to SSE. rdar://10538793 llvm-svn: 146191
-
Devang Patel authored
llvm-svn: 146187
-
Chad Rosier authored
llvm-svn: 146186
-
Jim Grosbach authored
For better 'gas' compatibility. llvm-svn: 146185
-
Devang Patel authored
Filter "sink to" candidate blocks sooner. This avoids unnecessary computation to determine whether the block dominates all uses or not. llvm-svn: 146184
-
Akira Hatanaka authored
MipsTargetLowering::LowerGlobalTLSAddress. This is necessary to have call16(__tls_get_addr) emitted instead of got_disp(__tls_get_addr) when the target is Mips64. llvm-svn: 146183
-
Jim Grosbach authored
llvm-svn: 146182
-
Owen Anderson authored
Don't explicitly marked libm rounding ops as legal on SSE4.1/AVX. There don't seem to be patterns for these, so I don't know why they were marked legal in the first place. Fixes failures caused by r146171. llvm-svn: 146180
-
Jim Grosbach authored
llvm-svn: 146179
-
Jim Grosbach authored
llvm-svn: 146177
-
Akira Hatanaka authored
- Modify lowering of global TLS address nodes. - Modify isel of ThreadPointer. - Wrap target global TLS address nodes that are operands of loads with WrapperPIC. - Remove Mips-specific DAG nodes TlsGd, TprelHi and TprelLo, which can be substituted with other existing nodes. llvm-svn: 146175
-
Owen Anderson authored
Teach SelectionDAG to match more calls to libm functions onto existing SDNodes. Mark these nodes as illegal by default, unless the target declares otherwise. llvm-svn: 146171
-
Jim Grosbach authored
rdar://10550084 llvm-svn: 146170
-
Evan Cheng authored
clients to decide whether to look inside bundled instructions and whether the query should return true if any / all bundled instructions have the queried property. llvm-svn: 146168
-
Evan Cheng authored
Many of the SSE patterns should not be selected when AVX is available. This led to the following code in X86Subtarget.cpp if (HasAVX) X86SSELevel = NoMMXSSE; This is so patterns that are predicated on hasSSE3, etc. would not be selected when avx is available. Instead, the AVX variant is selected. However, this breaks instructions which do not have AVX variants. The right way to fix this is for the SSE but not-AVX patterns to predicate on something like hasSSE3() && !hasAVX(). Then we can take out the hack in X86Subtarget.cpp. Patterns which do not have AVX variants do not need to change. However, we need to audit all the patterns before we make the change. This patch is workaround that fixes one specific case, the prefetch instructions. rdar://10538297 llvm-svn: 146163
-
Daniel Dunbar authored
sqrt/exp (fix for FSQRT, FSIN, FCOS, FPOWI, FPOW, FLOG, FLOG2, FLOG10, FEXP, FEXP2).", it is failing tests. llvm-svn: 146157
-
Jan Sjödin authored
llvm-svn: 146151
-
Nadav Rotem authored
We must not issue a bitcast operation for integer-promotion of vector types, because the location of the values in the vector may be different. llvm-svn: 146150
-
Stepan Dyatkovskiy authored
Fix bug 9905: Failure in code selection for llvm intrinsics sqrt/exp (fix for FSQRT, FSIN, FCOS, FPOWI, FPOW, FLOG, FLOG2, FLOG10, FEXP, FEXP2). llvm-svn: 146143
-
Hal Finkel authored
MTCTR needs to be glued to BCTR so that CTR is not marked dead in MTCTR (another find by -verify-machineinstrs) llvm-svn: 146137
-
Pete Cooper authored
llvm-svn: 146136
-
Jim Grosbach authored
llvm-svn: 146125
-
Jakob Stoklund Olesen authored
It is not used any more. We are tracking inline assembly misalignments directly through the BBInfo.Unalign and KnownBits fields. A simple conservative size estimate is not good enough since it can cause alignment padding to be underestimated. llvm-svn: 146124
-