in gcc.dg/pr27531-1.c.

llvm-svn: 51464

Bug: rcpps can only folds a load if the address is 16-byte aligned. Fixed many 'ps' load folding patterns in X86InstrSSE.td which are missing the proper alignment checks.
Also fixed some 80 col. violations.

llvm-svn: 51462

instructions.

llvm-svn: 51461

exclude struct and array types.

llvm-svn: 51460

exclude struct and array types.

llvm-svn: 51459

g++.dg/abi/key2.C

llvm-svn: 51458

exclude struct and array types.

llvm-svn: 51456

X86CodeEmitter should not set PIC style to None at initialization time. This will break codegen if relocation model is changed to PIC_ later.

llvm-svn: 51455

exclude struct and array types.

llvm-svn: 51452

and supported in the grammar, in the lexer.

llvm-svn: 51448

When rewriting defs and uses after spilling, don't set the weight of a
live interval to infinity if the instruction being rewritten is an
original remat def instruction.  We were only checking against the clone
of the remat def which doesn't actually appear in the IR at all.

llvm-svn: 51440

Don't attempt to update SpillSlotToUsesMap for stack slots that aren't
generated by the spiller.

llvm-svn: 51439

llvm-svn: 51436

llvm-svn: 51435

Rewrite operand loops to use iterators. This shrinks .o file (at gcc4.0.1 -O3 x86) substantially (>500 bytes). Reason still unknown.

llvm-svn: 51423

llvm-svn: 51422

get inline asm working as well as it did previously with the CBE
with the new MRV support for inline asm.

llvm-svn: 51420

with normal outputs.  Testcase here: 
test/CodeGen/X86/asm-indirect-mem.ll

llvm-svn: 51409

llvm-svn: 51407

more aggressive, and more correct.  Verify that we only attempt to
promote loads and stores.

llvm-svn: 51406

llvm-svn: 51399

BB1:                                                                                                                                                  
  vr1025 = copy vr1024                                                                                                                                
  ..                                                                                                                                                  
BB2:                                                                                                                                                  
  vr1024 = op                                                                                                                                         
         = op vr1025                                                                                                                                     
  <loop eventually branch back to BB1>

Even though vr1025 is copied from vr1024, it's not safe to coalesced them since live range of vr1025 intersects the def of vr1024. This happens when vr1025 is assigned the value of the previous iteration of vr1024 in the loop.

llvm-svn: 51394

they aren't in the header file, systems with a <string> header file that isn't
64-bit clean shouldn't warn if #including Path.h and specifying
-Wshorten-64-to-32.

llvm-svn: 51393

1. The "JITState" object creates a PassManager with the ModuleProvider that the
   jit is created with.  If the ModuleProvider is removed and deleted, the
   PassManager is invalid.

2. The Global maps in the JIT were not invalidated with a ModuleProvider was 
   removed.  This could lead to a case where the Module would be freed, and a 
   new Module with Globals at the same addresses could return invalid results.

llvm-svn: 51384

llvm-svn: 51372

ScalarEvolution::deleteValueFromRecords on it before doing the
replaceAllUsesWith, because ScalarEvolution looks at the instruction's
users to find SCEV references to the instruction's SCEV object in its
internal maps.

Move all of LSR's loop-related state clearing after processing the loop
and before cleaning up dead PHI nodes. This eliminates all of LSR's SCEV
references just before the calls to ScalarEvolution::deleteValueFromRecords
so that when ScalarEvolution drops its own SCEV references, the reference
counts will reach zero and the SCEVs will be deleted immediately.

These changes fix some compiler aborts involving ScalarEvolution holding
onto and reusing SCEV objects for instructions that have been deleted.
No regression test unfortunately; because the symptoms were due to
dangling pointers, reduced testcases ended up being fairly arbitrary.

llvm-svn: 51359

hoist them.

llvm-svn: 51356

now that instcombine also has ComputeNumSignBits.

llvm-svn: 51350

ComputeNumSignBits to SelectionDAG's ComputeNumSignBits.

llvm-svn: 51348

llvm-svn: 51345

llvm-svn: 51327

If local spiller optimization turns some instruction into an identity copy, it will be removed. If the output register happens to be dead (and source is obviously killed), transfer the kill / dead information to last use / def in the same MBB.

llvm-svn: 51306

llvm-svn: 51305

llvm-svn: 51303

  (add (sext x), cst) --> (sext (add x, cst'))
  (add (sext x), (sext y)) --> (sext (add int x, y))
  (add double (sitofp x), fpcst) --> (sitofp (add int x, intcst))
  (add double (sitofp x), (sitofp y)) --> (sitofp (add int x, y))

This generally reduces conversions.  For example MiBench/telecomm-gsm
gets these simplifications:

HACK2: 	%tmp67.i142.i.i = sext i16 %tmp6.i141.i.i to i32		; <i32> [#uses=1]
	%tmp23.i139.i.i = sext i16 %tmp2.i138.i.i to i32		; <i32> [#uses=1]
	%tmp8.i143.i.i = add i32 %tmp67.i142.i.i, %tmp23.i139.i.i		; <i32> [#uses=3]
HACK2: 	%tmp67.i121.i.i = sext i16 %tmp6.i120.i.i to i32		; <i32> [#uses=1]
	%tmp23.i118.i.i = sext i16 %tmp2.i117.i.i to i32		; <i32> [#uses=1]
	%tmp8.i122.i.i = add i32 %tmp67.i121.i.i, %tmp23.i118.i.i		; <i32> [#uses=3]
HACK2: 	%tmp67.i.i190.i = sext i16 %tmp6.i.i189.i to i32		; <i32> [#uses=1]
	%tmp23.i.i187.i = sext i16 %tmp2.i.i186.i to i32		; <i32> [#uses=1]
	%tmp8.i.i191.i = add i32 %tmp67.i.i190.i, %tmp23.i.i187.i		; <i32> [#uses=3]
HACK2: 	%tmp67.i173.i.i.i = sext i16 %tmp6.i172.i.i.i to i32		; <i32> [#uses=1]
	%tmp23.i170.i.i.i = sext i16 %tmp2.i169.i.i.i to i32		; <i32> [#uses=1]
	%tmp8.i174.i.i.i = add i32 %tmp67.i173.i.i.i, %tmp23.i170.i.i.i		; <i32> [#uses=3]
HACK2: 	%tmp67.i152.i.i.i = sext i16 %tmp6.i151.i.i.i to i32		; <i32> [#uses=1]
	%tmp23.i149.i.i.i = sext i16 %tmp2.i148.i.i.i to i32		; <i32> [#uses=1]
	%tmp8.i153.i.i.i = add i32 %tmp67.i152.i.i.i, %tmp23.i149.i.i.i		; <i32> [#uses=3]
HACK2: 	%tmp67.i.i.i.i = sext i16 %tmp6.i.i.i.i to i32		; <i32> [#uses=1]
	%tmp23.i.i5.i.i = sext i16 %tmp2.i.i.i.i to i32		; <i32> [#uses=1]
	%tmp8.i.i7.i.i = add i32 %tmp67.i.i.i.i, %tmp23.i.i5.i.i		; <i32> [#uses=3]


This also fixes a bug in ComputeNumSignBits handling select and
makes it more aggressive with and/or.

llvm-svn: 51302

llvm-svn: 51296

value as undef or untracked.

llvm-svn: 51295

will become first-class types.

llvm-svn: 51293

replaced is a PHI. This prevents it from inserting uses before defs
in the case that it isn't a PHI and it depends on other instructions
later in the block. This fixes the 447.dealII regression on x86-64.

llvm-svn: 51292

llvm-svn: 51291