-load-vn -gcse by 2.3%.

llvm-svn: 34160

llvm-svn: 34159

after the StructLayout object in memory.  This marginally improves locality,
speeding up -load-vn -gcse by ~0.8%.

llvm-svn: 34158

llvm-svn: 34157

llvm-svn: 34156

llvm-svn: 34154

in a vector.

llvm-svn: 34153

llvm-svn: 34109

llvm-svn: 34105

llvm-svn: 34101

llvm-svn: 34081

llvm-svn: 34072

llvm-svn: 34056

llvm-svn: 34040

definition of it into the CodeGen library. This is so that a backend doesn't
necessarily add in these writers if it doesn't use them (like in the lli
program).

llvm-svn: 34034

the code emitter and not set variables.

llvm-svn: 34033

llvm-svn: 34029

llvm-svn: 34013

llvm-svn: 34011

llvm-svn: 34010

llvm-svn: 34009

llvm-svn: 34000

that is the case, whenever we use it as a scratch register, save it to R12
first and then restore it after the use.
This is a temporary and truly horrible workaround!

llvm-svn: 33999

llvm-svn: 33998

- If there is a dynamic alloca, in the epilogue, restore the value of sp
  using r7 - offset.
- Other bug fixes.

llvm-svn: 33997

eliminateFrameIndex() is even more complicated if frame ptr is used instead of SP when there are dynamic alloca's.

llvm-svn: 33975

llvm-svn: 33971

llvm-svn: 33960

foldMemoryOperand() cannot fold tMOVrr sp into load / store in thumb mode. tLDRspi / tSTRspi cannot target / store high registers.

llvm-svn: 33958

llvm-svn: 33945

- If c does not fit in the offset field, materialize sp + c into a register
  using tADDhirr.

llvm-svn: 33944

must in order for backends that do want to support large integer types to be
able to function. Consequently, don't assert if the bitwidth > 64 bits
when computing the size and alignment. Instead, compute the size by rounding
up to the next even number of bytes for the size. Compute the alignment
as the same as the LongABIAlignment. These provide reasonable defaults
that the target can override.

llvm-svn: 33943

This patch replaces the SymbolTable class with ValueSymbolTable which does
not support types planes. This means that all symbol names in LLVM must now
be unique. The patch addresses the necessary changes to deal with this and
removes code no longer needed as a result. This completes the bulk of the
changes for this PR. Some cleanup patches will follow.

llvm-svn: 33918

X + C to promote LEA formation.  We would incorrectly apply it in some cases
(test) and miss it in others.

This fixes CodeGen/X86/2007-02-04-OrAddrMode.ll

llvm-svn: 33884

llvm-svn: 33832

llvm-svn: 33831

non-Mach-O-specific information.

llvm-svn: 33819

PPCMachOWriter is now trivial.

llvm-svn: 33818

llvm-svn: 33817

- Add debugging info.

llvm-svn: 33811